公开(公告)号：US11114527B2

公开(公告)日：2021-09-07

申请号：US16815636

申请日：2020-03-11

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Makoto Koshimizu ,  Hideki Niwayama ,  Kazuyuki Umezu ,  Hiroki Soeda ,  Atsushi Tachigami ,  Takeshi Iijima

IPC: H01L29/06 ,  H01L21/762 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  H01L29/08 ,  H01L29/10 ,  H01L29/417 ,  H01L29/45 ,  H01L29/49

Abstract: A terrace insulating film (SL) to be overridden by a gate electrode (G) of an nLDMOS device is configured by LOCOS, and a device isolation portion (SS) is configured by STI. Furthermore, on an outermost periphery of an active region where a plurality of nLDMOS devices are formed, a guard ring having the same potential as that of a drain region (D) is provided. And, via this guard ring, the device isolation portion (SS) is formed in a periphery of the active region, thereby not connecting but isolating the terrace insulating film (SL) and the device isolation portion (SS) from each other.