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公开(公告)号:US20190354646A1
公开(公告)日:2019-11-21
申请号:US16400872
申请日:2019-05-01
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Tetsuji TSUDA , Teruki FUKUYAMA , Toshio SUNAMI
Abstract: A program is executed in an information processing device including a processor and a memory. The program allows the processor to execute a step of, on the basis of a simulation result of a model in the case where a series of blocks having an input block, one or more operation blocks, and an output block are allowed to operate at a predetermined clock frequency, deciding a new clock frequency of a target block that is allowed to operate at a clock frequency lower than the predetermined clock frequency, and a step of setting the conversion ratios of conversion blocks so as to execute a simulation of the model in which the target block is allowed to operate at the new clock frequency lower than the predetermined clock frequency and the remaining blocks are allowed to operate at the predetermined clock frequency.
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公开(公告)号:US20200152248A1
公开(公告)日:2020-05-14
申请号:US16585858
申请日:2019-09-27
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Tetsuji TSUDA , Yutaka FUNABASHI , Teruki FUKUYAMA
IPC: G11C7/22 , G11C11/4096 , G11C7/10
Abstract: An interference of control signals is caused by a deviation in the start timings of counting between counters of timer counter units of a first MCU and a second MCU. And thus, when a count value of the counter of the MCU of a parent reaches a predetermined value D, the MCU of the parent transmits a trigger signal to the MCU of a child. The MCU of the child obtains the time difference between the start timings of the counts of the counters of the parent and the child from the difference between the D and a count value E of the child at that time. A count period of the child until a maximum value of the count value is reached is adjusted by the time difference.
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