公开(公告)号：US20200152248A1

公开(公告)日：2020-05-14

申请号：US16585858

申请日：2019-09-27

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Tetsuji TSUDA ,  Yutaka FUNABASHI ,  Teruki FUKUYAMA

IPC: G11C7/22 ,  G11C11/4096 ,  G11C7/10

Abstract: An interference of control signals is caused by a deviation in the start timings of counting between counters of timer counter units of a first MCU and a second MCU. And thus, when a count value of the counter of the MCU of a parent reaches a predetermined value D, the MCU of the parent transmits a trigger signal to the MCU of a child. The MCU of the child obtains the time difference between the start timings of the counts of the counters of the parent and the child from the difference between the D and a count value E of the child at that time. A count period of the child until a maximum value of the count value is reached is adjusted by the time difference.

公开(公告)号：US20180137022A1

公开(公告)日：2018-05-17

申请号：US15786350

申请日：2017-10-17

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Yutaka FUNABASHI ,  Masahiro KOKUBO ,  Yasushi ONISHI ,  Takuya TAKIZAWA

IPC: G06F11/22 ,  G06F9/30 ,  G06F11/26 ,  G06F11/07

CPC classification number: G06F11/261 ,  G06F11/263 ,  G06F11/36

Abstract: Provided are an arithmetic operation device and a virtual development environment apparatus making it possible to give desirable control including desirable fault injection from a test program to a virtual device model at a desirable timing.