公开(公告)号：US20230369257A1

公开(公告)日：2023-11-16

申请号：US17743033

申请日：2022-05-12

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Yoshikazu TANAKA ,  Tadashi KAMEYAMA ,  Takafumi BETSUI

IPC: H01L23/66 ,  H01P3/08

CPC classification number: H01L23/66 ,  H01P3/081 ,  H01L2223/6627 ,  H01L2223/6638

Abstract: A semiconductor device includes a semiconductor package having a differential signal terminal pair, and a wiring board. The wiring board includes a first and a second signal transmission line and a reference potential plane. The first and the second signal transmission line is formed in a first conductive layer and connected to the differential signal terminal pair. The reference potential plane includes a conductive pattern formed in a different conductive layer from the first conductive layer. The conductive pattern includes a first and a second region overlapped with the first and the second signal transmission line in plan view, respectively. The conductive pattern has a plurality of openings in the first and the second region. An area of a first conductive portion of the reference potential plane in the first region becomes equal to an area of a second conductive portion of the reference potential plane in the second region.