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公开(公告)号：US20150036732A1
公开(公告)日：2015-02-05
申请号：US14462561
申请日：2014-08-19
Applicant: Rambus Inc.
Inventor： Brian S. Leibowitz , Hae-Chang Lee , Jihong Ren , Ruwan Ratnayake
IPC: H04L25/03
CPC classification number: H04L25/03057 , G06F13/38 , H04L25/03019 , H04L25/0307 , H04L2025/03369 , H04L2025/03617
Abstract: A method is disclosed. The method includes sampling a data signal having a voltage value at an expected edge time of the data signal. A first alpha value is generated, and a second alpha value generated in dependence upon the voltage value. The data signal is adjusted by the first alpha value to derive a first adjusted signal. The data signal is adjusted by the second alpha value to derive a second adjusted signal. The first adjusted signal is sampled to output a first data value while the second adjusted signal is sampled to output a second data value. A selection is made between the first data value and the second data value as a function of a prior received data value to determine a received data value.
Abstract translation: 公开了一种方法。 该方法包括对数据信号的预期边沿时间具有电压值的数据信号进行采样。 产生第一个α值，并根据电压值生成第二个alpha值。 数据信号通过第一个alpha值进行调整，以得到第一个调整后的信号。 数据信号通过第二α值进行调整，以得到第二调整信号。 第一调整后的信号被采样以输出第一数据值，而第二调整信号被采样以输出第二数据值。 作为先前接收的数据值的函数，在第一数据值和第二数据值之间进行选择以确定接收到的数据值。
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公开(公告)号：US10855496B2
公开(公告)日：2020-12-01
申请号：US16057604
申请日：2018-08-07
Applicant: Rambus Inc.
Inventor： Brian S. Leibowitz , Hae-Chang Lee , Jihong Ren , Ruwan Ratnayake
Abstract: An integrated circuit (IC) memory device includes receiver circuitry to receive write data from a memory controller. The receiver circuitry includes equalization circuitry having at least one tap to equalize the write data. The equalization circuitry includes a tap weight adapter circuit to adaptively generate a tap weight for the tap from an edge analysis of previously received write data.
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公开(公告)号：US20160373277A1
公开(公告)日：2016-12-22
申请号：US15178493
申请日：2016-06-09
Applicant: Rambus Inc.
Inventor： Brian S. Leibowitz , Hae-Chang Lee , Jihong Ren , Ruwan Ratnayake
IPC: H04L25/03
CPC classification number: H04L25/03057 , G06F13/38 , H04L25/03019 , H04L25/0307 , H04L2025/03369 , H04L2025/03617
Abstract: A method is disclosed. The method includes sampling a data signal having a voltage value at an expected edge time of the data signal. A first alpha value is generated, and a second alpha value generated in dependence upon the voltage value. The data signal is adjusted the first alpha value to derive a first adjusted signal. The data signal is adjusted by the second alpha value to derive a second adjusted signal. The first adjusted signal is sampled to output a first data value while the second adjusted signal is sampled to output a second data value. A selection is made between the first data value and the second data value as a function of a prior received data value to determine a received data value.
Abstract translation: 公开了一种方法。 该方法包括对数据信号的预期边沿时间具有电压值的数据信号进行采样。 产生第一个α值，并根据电压值生成第二个alpha值。 数据信号被调整为第一个α值以导出第一个调整的信号。 数据信号通过第二α值进行调整，以得到第二调整信号。 第一调整后的信号被采样以输出第一数据值，而第二调整信号被采样以输出第二数据值。 作为先前接收的数据值的函数，在第一数据值和第二数据值之间进行选择，以确定接收到的数据值。
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公开(公告)号：US08811553B2
公开(公告)日：2014-08-19
申请号：US13932561
申请日：2013-07-01
Applicant: Rambus Inc.
Inventor： Brian S. Leibowitz , Hae-Chang Lee , Jihong Ren , Ruwan Ratnayake
CPC classification number: H04L25/03057 , G06F13/38 , H04L25/03019 , H04L25/0307 , H04L2025/03369 , H04L2025/03617
Abstract: A device implements data reception with edge-based partial response decision feedback equalization. In an example embodiment, the device implements a tap weight adapter circuit that sets the tap weights that are used for adjustment of a received data signal. The tap weight adapter circuit sets the tap weights based on previously determined data values and input from an edge analysis of the received data signal using a set of edge samplers. The edge analysis may include adjusting the sampled data signal by the tap weights determined by the tap weight adapter circuit. A clock generation circuit generates an edge clock signal to control the edge sampling performed by the set of edge samplers. The edge clock signal may be generated as a function of the signals of the edge samplers and prior data values determined by the equalizer.
Abstract translation: 设备实现基于边缘的部分响应判决反馈均衡的数据接收。 在一个示例性实施例中，该设备实现一个抽头权重适配器电路，其设置用于调整接收到的数据信号的抽头权重。 抽头重量适配器电路基于先前确定的数据值设置抽头权重，并使用一组边缘采样器从接收数据信号的边缘分析输入。 边缘分析可以包括通过由抽头权重适配器电路确定的抽头权重来调整采样的数据信号。 时钟发生电路产生边沿时钟信号，以控制由边缘采样器组执行的边缘采样。 可以根据边缘采样器的信号和由均衡器确定的先前数据值来生成边沿时钟信号。
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公开(公告)号：US20230291617A1
公开(公告)日：2023-09-14
申请号：US17965676
申请日：2022-10-13
Applicant: Rambus Inc.
Inventor： Brian S. Leibowitz , Hae-Chang Lee , Jihong Ren , Ruwan Ratnayake
CPC classification number: H04L25/03057 , H04L25/03019 , G06F13/38 , H04L25/0307 , H04L2025/03617 , H04L2025/03369
Abstract: A method is disclosed. The method includes sampling a data signal having a voltage value at an expected edge time of the data signal. A first alpha value is generated, and a second alpha value generated in dependence upon the voltage value. The data signal is adjusted by the first alpha value to derive a first adjusted signal. The data signal is adjusted by the second alpha value to derive a second adjusted signal. The first adjusted signal is sampled to output a first data value while the second adjusted signal is sampled to output a second data value. A selection is made between the first data value and the second data value as a function of a prior received data value to determine a received data value.
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Patent Agency Ranking
公开(公告)号：US11489703B2
公开(公告)日：2022-11-01
申请号：US16953225
申请日：2020-11-19
Applicant: Rambus Inc.
Inventor： Brian S. Leibowitz , Hae-Chang Lee , Jihong Ren , Ruwan Ratnayake
Abstract: An intergrated circuit (IC) chip includes receiver circuitry to receive signals from a second IC chip. The receiver circuitry includes equalization circuitry having at least one tap to equalize the signals. The equalization circuitry includes a tap weight adapter circuit to generate at least one tap weight corresponding to the at least one tap based on edge information of previously received signals.
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公开(公告)号：US20190075000A1
公开(公告)日：2019-03-07
申请号：US16057604
申请日：2018-08-07
Applicant: Rambus Inc.
Inventor： Brian S. Leibowitz , Hae-Chang Lee , Jihong Ren , Ruwan Ratnayake
Abstract: A method is disclosed. The method includes sampling a data signal having a voltage value at an expected edge time of the data signal. A first alpha value is generated, and a second alpha value generated in dependence upon the voltage value. The data signal is adjusted by the first alpha value to derive a first adjusted signal. The data signal is adjusted by the second alpha value to derive a second adjusted signal. The first adjusted signal is sampled to output a first data value while the second adjusted signal is sampled to output a second data value. A selection is made between the first data value and the second data value as a function of a prior received data value to determine a received data value.
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公开(公告)号：US20210152401A1
公开(公告)日：2021-05-20
申请号：US16953225
申请日：2020-11-19
Applicant: Rambus Inc.
Inventor： Brian S. Leibowitz , Hae-Chang Lee , Jihong Ren , Ruwan Ratnayake
Abstract: A method is disclosed. The method includes sampling a data signal having a voltage value at an expected edge time of the data signal. A first alpha value is generated, and a second alpha value generated in dependence upon the voltage value. The data signal is adjusted by the first alpha value to derive a first adjusted signal. The data signal is adjusted by the second alpha value to derive a second adjusted signal. The first adjusted signal is sampled to output a first data value while the second adjusted signal is sampled to output a second data value. A selection is made between the first data value and the second data value as a function of a prior received data value to determine a received data value.
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公开(公告)号：US10044530B2
公开(公告)日：2018-08-07
申请号：US15178493
申请日：2016-06-09
Applicant: Rambus Inc.
Inventor： Brian S. Leibowitz , Hae-Chang Lee , Jihong Ren , Ruwan Ratnayake
Abstract: An integrated circuit (IC) memory controller includes receiver circuitry to receive read data from a memory. The receiver circuitry includes equalization circuitry having at least one tap to apply data level equalization to the read data, and a tap weight adapter circuit. The tap weight adapter circuit adaptively generates a data level tap weight corresponding to the data level equalization from an edge analysis of previously received read data.
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公开(公告)号：US09391816B2
公开(公告)日：2016-07-12
申请号：US14462561
申请日：2014-08-19
Applicant: Rambus Inc.
Inventor： Brian S. Leibowitz , Hae-Chang Lee , Jihong Ren , Ruwan Ratnayake
CPC classification number: H04L25/03057 , G06F13/38 , H04L25/03019 , H04L25/0307 , H04L2025/03369 , H04L2025/03617
Abstract: A method is disclosed. The method includes sampling a data signal having a voltage value at an expected edge time of the data signal. A first alpha value is generated, and a second alpha value generated in dependence upon the voltage value. The data signal is adjusted by the first alpha value to derive a first adjusted signal. The data signal is adjusted by the second alpha value to derive a second adjusted signal. The first adjusted signal is sampled to output a first data value while the second adjusted signal is sampled to output a second data value. A selection is made between the first data value and the second data value as a function of a prior received data value to determine a received data value.
Abstract translation: 公开了一种方法。 该方法包括对数据信号的预期边沿时间具有电压值的数据信号进行采样。 产生第一个α值，并根据电压值生成第二个alpha值。 数据信号通过第一个alpha值进行调整，以得到第一个调整后的信号。 数据信号通过第二α值进行调整，以得到第二调整信号。 第一调整后的信号被采样以输出第一数据值，而第二调整信号被采样以输出第二数据值。 作为先前接收的数据值的函数，在第一数据值和第二数据值之间进行选择，以确定接收到的数据值。
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