公开(公告)号：US20130168674A1

公开(公告)日：2013-07-04

申请号：US13719724

申请日：2012-12-19

Applicant: Rambus Inc.

Inventor： Paul D. Franzon ,  Thomas Vogelsang ,  Frederick A. Ware ,  Wayne Ellis

IPC: H01L23/48 ,  H01L27/10

CPC classification number: H01L23/481 ,  G11C7/1045 ,  G11C29/006 ,  G11C29/785 ,  G11C29/816 ,  G11C29/83 ,  H01L22/34 ,  H01L23/5256 ,  H01L25/0657 ,  H01L27/0688 ,  H01L27/10 ,  H01L2225/06544 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A three-dimensional integrated circuit (3D-IC) includes a stack of semiconductor wafers, each of which includes a substrate and a device layer. Programmable components, such as memory arrays or logic circuits, are formed within the device layers. Some of the programmable components are redundant, and can be substituted for defective components by programming passive memory elements in a separate conductive layer provided for this purpose. The separate conductive layer is devoid of active devices, and is therefore relatively reliable and inexpensive.

Abstract translation: 三维集成电路（3D-IC）包括一堆半导体晶片，每个半导体晶片包括基板和器件层。 可编程组件，例如存储器阵列或逻辑电路，在器件层内形成。 一些可编程组件是冗余的，并且可以通过在为此目的提供的单独导电层中编程无源存储器元件来代替有缺陷的组件。 单独的导电层没有有源器件，因此是相对可靠和便宜的。

公开(公告)号：US09411678B1

公开(公告)日：2016-08-09

申请号：US13828828

申请日：2013-03-14

Applicant: Rambus Inc.

Inventor： Frederick A. Ware ,  Suresh Rajan ,  Ely Tsern ,  Thomas Vogelsang ,  Wayne Ellis

IPC: H03M13/00 ,  G06F11/10

CPC classification number: G06F11/1008

Abstract: A method of operation in a memory device, comprising storing data in a first group of storage locations in the memory device, storing error information associated with the stored data in a second group of storage locations in the memory device, and selectively evaluating the error information based on a state of an error enable bit, the state based on whether a most recent access to the first group of storage locations involved a partial access.

Abstract translation: 一种在存储器件中的操作方法，包括将数据存储在存储器件中的第一组存储位置中，将与存储的数据相关联的错误信息存储在存储器件中的第二组存储位置中，并且选择性地评估误差信息 基于错误使能位的状态，基于对第一组存储位置的最近访问是否涉及部分访问的状态。