Manufacturing Method for Partially-Good Memory Modules with Defect Table in EEPROM
    1.
    发明申请
    Manufacturing Method for Partially-Good Memory Modules with Defect Table in EEPROM 有权
    EEPROM中具有缺陷表的部分良好存储器模块的制造方法

    公开(公告)号:US20090137070A1

    公开(公告)日:2009-05-28

    申请号:US11944551

    申请日:2007-11-23

    IPC分类号: H01L21/66

    摘要: A manufacturing method makes memory modules from partially-good DRAM chips soldered to its substrate. The partially-good DRAM chips have a number of defective memory cells that is below a test threshold, such as 10%. Packaged DRAM chips are optionally pre-screened and considered to pass when the number of defects found is less than the test threshold. A defect table is created during testing and written to a serial-presence-detect electrically-erasable read-only memory (SPD-EEPROM) on the memory module. The memory module is finally tested on a target-system tester that reads the defect table during booting, and redirects memory access to defective memory locations identified by the defect table. The memory modules may be burned in or tested at various temperatures and voltages to increase reliability.

    摘要翻译: 制造方法使得部分良好的DRAM芯片的存储器模块焊接到其衬底。 部分良好的DRAM芯片具有低于测试阈值的多个缺陷存储器单元,例如10%。 当发现的缺陷数量小于测试阈值时,封装的DRAM芯片可以预先筛选并被认为是通过的。 在测试期间创建缺陷表,并将其写入存储器模块上的串行存在检测电可擦除只读存储器(SPD-EEPROM)。 内存模块最终在目标系统测试器上进行测试,该测试仪在引导期间读取缺陷表,并将存储器访问重定向到由缺陷表识别的缺陷存储器位置。 存储器模块可以在各种温度和电压下燃烧或测试以增加可靠性。

    Memory module with a defective memory chip having defective blocks disabled by non-multiplexed address lines to the defective chip
    2.
    发明授权
    Memory module with a defective memory chip having defective blocks disabled by non-multiplexed address lines to the defective chip 有权
    具有缺陷存储器芯片的存储器模块具有通过非多路复用地址线到缺陷芯片而禁用的缺陷块

    公开(公告)号:US07277337B1

    公开(公告)日:2007-10-02

    申请号:US11309782

    申请日:2006-09-25

    IPC分类号: G11C29/00

    摘要: A downgraded memory module has downgraded DRAM chips soldered to its substrate. The downgraded DRAM chips have a defective memory cell in a logical quadrant of the memory. A physical MSB is a row address present on a non-downgraded DRAM of size S but not used on a downgraded DRAM size S/2. The physical MSB and a second address pin are non-multiplexed address pins that do not carry column addresses. The physical MSB and the second address pin logically divided the DRAM into quadrants. Two good quadrants without defects are selected, and jumpers on the memory module drive the physical MSB and the second address pin with signals that select only these two quadrants and disable access to quadrants containing defects. DRAM chips can be marked or sorted into bins for combinations of good quadrants. Downgraded memory modules have all DRAM chips from the same bin that share jumper settings.

    摘要翻译: 降级的存储器模块将DRAM芯片降级到其基板。 降级的DRAM芯片在存储器的逻辑象限中具有有缺陷的存储单元。 物理MSB是存在于尺寸为S的未降级DRAM上但不降级DRAM大小S / 2的行地址。 物理MSB和第二个地址引脚是不带有列地址的非多路复用地址引脚。 物理MSB和第二个地址引脚将DRAM逻辑划分为象限。 选择没有缺陷的两个良好象限,并且存储器模块上的跳线使用仅选择这两个象限的信号驱动物理MSB和第二个地址引脚,并禁止访问包含缺陷的象限。 可以将DRAM芯片标记或分类到用于良好象限组合的箱中。 降级的内存模块具有来自共享跳线设置的同一个bin的所有DRAM芯片。

    Manufacturing method for partially-good memory modules with defect table in EEPROM
    3.
    发明授权
    Manufacturing method for partially-good memory modules with defect table in EEPROM 有权
    EEPROM中具有缺陷表的部分良好存储器模块的制造方法

    公开(公告)号:US07642105B2

    公开(公告)日:2010-01-05

    申请号:US11944551

    申请日:2007-11-23

    IPC分类号: H01L21/66 G01R31/26 G11C29/00

    摘要: A manufacturing method makes memory modules from partially-good DRAM chips soldered to its substrate. The partially-good DRAM chips have a number of defective memory cells that is below a test threshold, such as 10%. Packaged DRAM chips are optionally pre-screened and considered to pass when the number of defects found is less than the test threshold. A defect table is created during testing and written to a serial-presence-detect electrically-erasable read-only memory (SPD-EEPROM) on the memory module. The memory module is finally tested on a target-system tester that reads the defect table during booting, and redirects memory access to defective memory locations identified by the defect table. The memory modules may be burned in or tested at various temperatures and voltages to increase reliability.

    摘要翻译: 制造方法使得部分良好的DRAM芯片的存储器模块焊接到其衬底。 部分良好的DRAM芯片具有低于测试阈值的多个缺陷存储器单元,例如10%。 当发现的缺陷数量小于测试阈值时,封装的DRAM芯片可以预先筛选并被认为是通过的。 在测试期间创建缺陷表,并将其写入存储器模块上的串行存在检测电可擦除只读存储器(SPD-EEPROM)。 内存模块最终在目标系统测试器上进行测试,该测试仪在引导期间读取缺陷表,并将存储器访问重定向到由缺陷表识别的缺陷存储器位置。 存储器模块可以在各种温度和电压下燃烧或测试以增加可靠性。

    Repairing Advanced-Memory Buffer (AMB) with redundant memory buffer for repairing DRAM on a fully-buffered memory-module
    4.
    发明授权
    Repairing Advanced-Memory Buffer (AMB) with redundant memory buffer for repairing DRAM on a fully-buffered memory-module 有权
    使用冗余内存缓冲区修复高级内存缓冲区(AMB),以修复全缓冲内存模块上的DRAM

    公开(公告)号:US07474576B2

    公开(公告)日:2009-01-06

    申请号:US12053261

    申请日:2008-03-21

    申请人: Ramon S. Co David Sun

    发明人: Ramon S. Co David Sun

    IPC分类号: G11C29/00

    CPC分类号: G11C5/04 G11C29/808 G11C29/88

    摘要: A repairing fully-buffered memory module can have memory chips with some defects such as single-bit errors. A repair controller is added to the Advanced Memory Buffer (AMB) on the memory module. The AMB fully buffers memory requests that are sent as serial packets over southbound lanes from a host. Memory-access addresses are extracted from the serial packets by the AMB. The repair controller compares the memory-access addresses to repair addresses and diverts access from defective memory chips to a spare memory for the repair addresses. The repair addresses can be located during testing of the memory module and programmed into a repair address buffer on the AMB. The repair addresses could be first programmed into a serial-presence-detect electrically-erasable programmable read-only memory (SPD-EEPROM) on the memory module, and then copied to the repair address buffer on the AMB during power-up.

    摘要翻译: 修复全缓冲存储器模块可以具有存在诸如单位错误等缺陷的存储器芯片。 修复控制器被添加到内存模块的高级内存缓冲区(AMB)中。 AMB完全缓冲从主机通过南行车道作为串行数据包发送的内存请求。 AMB从串行数据包中提取存储器访问地址。 修复控制器将存储器访问地址与修复地址进行比较,并将从缺陷存储器芯片的访问转移到用于修复地址的备用存储器。 修复地址可以在测试存储器模块期间定位并编程到AMB上的修复地址缓冲区中。 修复地址可以首先编程到存储器模块上的串行存在检测电可擦除可编程只读存储器(SPD-EEPROM)中,然后在上电期间复制到AMB上的修复地址缓冲区。

    Repairing Advanced-Memory Buffer (AMB) with Redundant Memory Buffer for Repairing DRAM on a Fully-Buffered Memory-Module
    5.
    发明申请
    Repairing Advanced-Memory Buffer (AMB) with Redundant Memory Buffer for Repairing DRAM on a Fully-Buffered Memory-Module 有权
    使用冗余内存缓冲区修复高级内存缓冲区(AMB),以修复全缓冲内存模块上的DRAM

    公开(公告)号:US20080165600A1

    公开(公告)日:2008-07-10

    申请号:US12053261

    申请日:2008-03-21

    申请人: Ramon S. Co David Sun

    发明人: Ramon S. Co David Sun

    IPC分类号: G11C29/00 G11C8/00

    CPC分类号: G11C5/04 G11C29/808 G11C29/88

    摘要: A repairing fully-buffered memory module can have memory chips with some defects such as single-bit errors. A repair controller is added to the Advanced Memory Buffer (AMB) on the memory module. The AMB fully buffers memory requests that are sent as serial packets over southbound lanes from a host. Memory-access addresses are extracted from the serial packets by the AMB. The repair controller compares the memory-access addresses to repair addresses and diverts access from defective memory chips to a spare memory for the repair addresses. The repair addresses can be located during testing of the memory module and programmed into a repair address buffer on the AMB. The repair addresses could be first programmed into a serial-presence-detect electrically-erasable programmable read-only memory (SPD-EEPROM) on the memory module, and then copied to the repair address buffer on the AMB during power-up.

    摘要翻译: 修复全缓冲存储器模块可以具有存在诸如单位错误等缺陷的存储器芯片。 修复控制器被添加到内存模块的高级内存缓冲区(AMB)中。 AMB完全缓冲从主机通过南行车道作为串行数据包发送的内存请求。 AMB从串行数据包中提取存储器访问地址。 修复控制器将存储器访问地址与修复地址进行比较,并将从缺陷存储器芯片的访问转移到用于修复地址的备用存储器。 修复地址可以在测试存储器模块期间定位并编程到AMB上的修复地址缓冲区中。 修复地址可以首先编程到存储器模块上的串行存在检测电可擦除可编程只读存储器(SPD-EEPROM)中,然后在上电期间复制到AMB上的修复地址缓冲区。

    Repairing advanced-memory buffer (AMB) with redundant memory buffer for repairing DRAM on a fully-buffered memory-module
    6.
    发明授权
    Repairing advanced-memory buffer (AMB) with redundant memory buffer for repairing DRAM on a fully-buffered memory-module 有权
    使用冗余内存缓冲区修复高级内存缓冲区(AMB),以便在完全缓冲的内存模块上修复DRAM

    公开(公告)号:US07619938B2

    公开(公告)日:2009-11-17

    申请号:US12275957

    申请日:2008-11-21

    申请人: Ramon S. Co David Sun

    发明人: Ramon S. Co David Sun

    IPC分类号: G11C29/00

    CPC分类号: G11C5/04 G11C29/808 G11C29/88

    摘要: A repairing fully-buffered memory module can have memory chips with some defects such as single-bit errors. A repair controller is added to the Advanced Memory Buffer (AMB) on the memory module. The AMB fully buffers memory requests that are sent as serial packets over southbound lanes from a host. Memory-access addresses are extracted from the serial packets by the AMB. The repair controller compares the memory-access addresses to repair addresses and diverts access from defective memory chips to a spare memory for the repair addresses. The repair addresses can be located during testing of the memory module and programmed into a repair address buffer on the AMB. The repair addresses could be first programmed into a serial-presence-detect electrically-erasable programmable read-only memory (SPD-EEPROM) on the memory module, and then copied to the repair address buffer on the AMB during power-up.

    摘要翻译: 修复全缓冲存储器模块可以具有存在诸如单位错误等缺陷的存储器芯片。 修复控制器被添加到内存模块的高级内存缓冲区(AMB)中。 AMB完全缓冲从主机通过南行车道作为串行数据包发送的内存请求。 AMB从串行数据包中提取存储器访问地址。 修复控制器将存储器访问地址与修复地址进行比较,并将从缺陷存储器芯片的访问转移到用于修复地址的备用存储器。 修复地址可以在测试存储器模块期间定位并编程到AMB上的修复地址缓冲区中。 修复地址可以首先编程到存储器模块上的串行存在检测电可擦除可编程只读存储器(SPD-EEPROM)中,然后在上电期间复制到AMB上的修复地址缓冲区。

    Fully-buffered memory-module with error-correction code (ECC) controller in serializing advanced-memory buffer (AMB) that is transparent to motherboard memory controller
    7.
    发明授权
    Fully-buffered memory-module with error-correction code (ECC) controller in serializing advanced-memory buffer (AMB) that is transparent to motherboard memory controller 有权
    具有错误校正码(ECC)控制器的全缓冲存储器模块,串行化为主板内存控制器透明的高级内存缓冲区(AMB)

    公开(公告)号:US07487428B2

    公开(公告)日:2009-02-03

    申请号:US11309298

    申请日:2006-07-24

    申请人: Ramon S. Co David Sun

    发明人: Ramon S. Co David Sun

    IPC分类号: G11C29/00

    摘要: An error-correcting fully-buffered memory module can detect and correct some errors in data read from memory chips. An error correction code ECC controller is added to the Advanced Memory Buffer (AMB) on the memory module that fully buffers memory requests sent as serial packets. The error correction controller generates ECC bits for write data, and both the ECC bits and the write data are written to the memory chips by a DRAM controller in the AMB. During reads, an ECC checker generates a syndrome and can activate an error corrector to correct data or signal a non-correctable error. The corrected data is formed into serial packets sent back to the motherboard by the AMB. Configuration data for the ECC controller could be first programmed into a serial-presence-detect electrically-erasable programmable read-only memory (SPD-EEPROM) on the memory module, and then copied to error-correction configuration registers on the AMB during power-up.

    摘要翻译: 纠错完全缓冲存储器模块可以检测和纠正从存储器芯片读取的数据中的一些错误。 纠错码ECC控制器被添加到存储器模块上的高级存储器缓冲器(AMB),该存储器模块完全缓冲作为串行数据包发送的存储器请求。 纠错控制器产生用于写数据的ECC位,并且ECC位和写数据都由AMB中的DRAM控制器写入存储器芯片。 在读取期间,ECC检查器产生综合征,并且可以激活错误校正器以校正数据或发出不可纠错的错误。 校正后的数据形成为由AMB发回主板的串行数据包。 可以首先将ECC控制器的配置数据编程到存储器模块上的串行存在检测电可擦除可编程只读存储器(SPD-EEPROM)中,然后在上电时复制到AMB上的纠错配置寄存器中, 向上。

    Fully-Buffered Memory-Module with Redundant Memory Buffer in Serializing Advanced-Memory Buffer (AMB) for Repairing DRAM
    8.
    发明申请
    Fully-Buffered Memory-Module with Redundant Memory Buffer in Serializing Advanced-Memory Buffer (AMB) for Repairing DRAM 有权
    具有冗余存储器缓冲器的全缓冲存储器模块,用于序列化用于修复DRAM的高级存储器缓冲器(AMB)

    公开(公告)号:US20080019198A1

    公开(公告)日:2008-01-24

    申请号:US11309297

    申请日:2006-07-24

    申请人: Ramon S. Co David Sun

    发明人: Ramon S. Co David Sun

    IPC分类号: G11C29/00

    CPC分类号: G11C5/04 G11C29/808 G11C29/88

    摘要: A repairing fully-buffered memory module can have memory chips with some defects such as single-bit errors. A repair controller is added to the Advanced Memory Buffer (AMB) on the memory module. The AMB fully buffers memory requests that are sent as serial packets over southbound lanes from a host. Memory-access addresses are extracted from the serial packets by the AMB. The repair controller compares the memory-access addresses to repair addresses and diverts access from defective memory chips to a spare memory for the repair addresses. The repair addresses can be located during testing of the memory module and programmed into a repair address buffer on the AMB. The repair addresses could be first programmed into a serial-presence-detect electrically-erasable programmable read-only memory (SPD-EEPROM) on the memory module, and then copied to the repair address buffer on the AMB during power-up.

    摘要翻译: 修复全缓冲存储器模块可以具有存在诸如单位错误等缺陷的存储器芯片。 修复控制器被添加到内存模块的高级内存缓冲区(AMB)中。 AMB完全缓冲从主机通过南行车道作为串行数据包发送的内存请求。 AMB从串行数据包中提取存储器访问地址。 修复控制器将存储器访问地址与修复地址进行比较,并将从缺陷存储器芯片的访问转移到用于修复地址的备用存储器。 修复地址可以在测试存储器模块期间定位并编程到AMB上的修复地址缓冲区中。 修复地址可以首先编程到存储器模块上的串行存在检测电可擦除可编程只读存储器(SPD-EEPROM)中,然后在上电期间复制到AMB上的修复地址缓冲区。

    Sliding levered handles engaging and pushing memory modules into extender-card socket
    9.
    发明授权
    Sliding levered handles engaging and pushing memory modules into extender-card socket 有权
    滑动杠杆把手将内存模块插入扩展卡插槽

    公开(公告)号:US06981886B1

    公开(公告)日:2006-01-03

    申请号:US10906319

    申请日:2005-02-14

    申请人: Ramon S. Co David Sun

    发明人: Ramon S. Co David Sun

    IPC分类号: H01R13/62

    CPC分类号: H01R13/62988 H01R12/721

    摘要: A levered handle has an elongated slot that allows the levered handle to both slide and pivot over a pivot axis. The levered handle is slid over the pivot axis to allow a notch engager to engage a notch on a memory module. Then the notch engager is forced downward as the levered handle pivots upward about the pivot axis, causing a downward force to be applied to the notch on the memory module. This forces the memory module into a memory module socket. The memory module socket requires a reduced insertion force because the notch engager on the levered handle engages the notch on the memory module and applies downward pressure. A levered handle without the elongated slot can slide along the pivot axis perpendicular to the memory module to engage the notch. Both ejection and insertion forces can be reduced.

    摘要翻译: 杠杆手柄具有细长的槽,其允许杠杆手柄滑动并在枢轴上枢转。 杠杆手柄在枢转轴线上滑动以允许凹口接合器接合存储器模块上的凹口。 然后,当杠杆手柄绕枢转轴向上枢转时,切口接合器被迫向下,导致向下的力施加到存储器模块上的凹口。 这将强制内存模块进入内存模块插槽。 存储器模块插座需要减小的插入力,因为在杠杆柄上的凹口接合存储器模块上的凹口并施加向下的压力。 没有细长槽的杠杆手柄可以沿着垂直于存储器模块的枢转轴线滑动以接合凹口。 弹出和插入力都可以减小。

    Repairing Advanced-Memory Buffer (AMB) with Redundant Memory Buffer for Repairing DRAM on a Fully-Buffered Memory-Module
    10.
    发明申请
    Repairing Advanced-Memory Buffer (AMB) with Redundant Memory Buffer for Repairing DRAM on a Fully-Buffered Memory-Module 有权
    使用冗余内存缓冲区修复高级内存缓冲区(AMB),以修复全缓冲内存模块上的DRAM

    公开(公告)号:US20090073788A1

    公开(公告)日:2009-03-19

    申请号:US12275957

    申请日:2008-11-21

    申请人: Ramon S. Co David Sun

    发明人: Ramon S. Co David Sun

    IPC分类号: G11C29/00 G11C8/00

    CPC分类号: G11C5/04 G11C29/808 G11C29/88

    摘要: A repairing fully-buffered memory module can have memory chips with some defects such as single-bit errors. A repair controller is added to the Advanced Memory Buffer (AMB) on the memory module. The AMB fully buffers memory requests that are sent as serial packets over southbound lanes from a host. Memory-access addresses are extracted from the serial packets by the AMB. The repair controller compares the memory-access addresses to repair addresses and diverts access from defective memory chips to a spare memory for the repair addresses. The repair addresses can be located during testing of the memory module and programmed into a repair address buffer on the AMB. The repair addresses could be first programmed into a serial-presence-detect electrically-erasable programmable read-only memory (SPD-EEPROM) on the memory module, and then copied to the repair address buffer on the AMB during power-up.

    摘要翻译: 修复全缓冲存储器模块可以具有存在诸如单位错误等缺陷的存储器芯片。 修复控制器被添加到内存模块的高级内存缓冲区(AMB)中。 AMB完全缓冲从主机通过南行车道作为串行数据包发送的内存请求。 AMB从串行数据包中提取存储器访问地址。 修复控制器将存储器访问地址与修复地址进行比较,并将从缺陷存储器芯片的访问转移到用于修复地址的备用存储器。 修复地址可以在测试存储器模块期间定位并编程到AMB上的修复地址缓冲区中。 修复地址可以首先编程到存储器模块上的串行存在检测电可擦除可编程只读存储器(SPD-EEPROM)中,然后在上电期间复制到AMB上的修复地址缓冲区。