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公开(公告)号：US5204964A
公开(公告)日：1993-04-20
申请号：US593917
申请日：1990-10-05
申请人： Raymond D. Bowden, III , Michelle A. Pence , George J. Barlow , Marc E. Sanfacon , Jeffrey S. Somers
发明人： Raymond D. Bowden, III , Michelle A. Pence , George J. Barlow , Marc E. Sanfacon , Jeffrey S. Somers
IPC分类号： G06F11/14 , G06F11/20 , G11C7/20 , G11C11/406
CPC分类号： G06F11/1441 , G11C11/406 , G11C7/20 , G06F11/2015
摘要： A method and apparatus for resetting memory state when power is applied to the system. The memory has memory elements, a refresh clock and a refresh counter for counting refresh cycles and providing refresh signals to the memory elements, the memory elements and refresh means being connected from the power system and from a battery back-up means. A state detection means is connected from the refresh counter for detecting a change in state of the refresh counter to a state equivalent to the reset state of the refresh counter and asserting a state change signal. A means responsive to the state change signal and to the occurrence of the reset signal provides a memory controller reset signal, so that the memory controller reset signal occurs in synchronization with the change of state of the refresh counter to a state equivalent to the refresh counter reset state. The memory reset further includes a time-out counter means responsive to the assertion of the reset signal and to the refresh clock for counting refresh cycles in synchronization with the refresh counter. A time-out detection means is responsive to the time out counter means for providing a time out signal when the time-out counter has counted a refresh period plus one clock cycle and to the state change signal for providing the memory controller reset signal when the time-out counter has counted a refresh cycle plus one clock period and the state change signal has not been asserted.
摘要翻译： 一种当向系统施加电力时复位存储器状态的方法和装置。 存储器具有存储器元件，刷新时钟和刷新计数器，用于对刷新周期进行计数，并向存储器元件提供刷新信号，存储器元件和刷新装置从电力系统和电池备用装置连接。 状态检测装置从刷新计数器连接，用于检测刷新计数器的状态改变到与刷新计数器的复位状态相当的状态，并且断言状态改变信号。 响应于状态改变信号和复位信号的发生的装置提供存储器控制器复位信号，使得存储器控制器复位信号与刷新计数器的状态改变同步到与刷新计数器相当的状态 复位状态。 存储器复位还包括响应于重置信号的断言和与刷新计数器同步来刷新周期的刷新时钟的超时计数器装置。 超时检测装置响应于超时计数器装置，用于当超时计数器已经计数了刷新周期加一个时钟周期时提供超时信号，以及当状态改变信号提供存储器控制器复位信号时 超时计数器已经计数了刷新周期加上一个时钟周期，状态改变信号还没有被断言。
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公开(公告)号：US4964130A
公开(公告)日：1990-10-16
申请号：US287928
申请日：1988-12-21
CPC分类号： G06F11/0766 , G06F11/073 , G06F11/106 , G06F11/1024
摘要： A system and method for detecting an error that occurred in a multi-chip memory storage device in a data processing system. The system detects an error and receives data and check bits associated therewith. A process that uses the principle of scrubbing and incorporates high speed error flags distinguishes between hard and soft errors.
摘要翻译： 一种用于检测在数据处理系统中的多芯片存储器存储装置中发生的错误的系统和方法。 系统检测到错误并接收与之相关的数据和校验位。 使用擦洗原理并结合高速误差标志的过程区分硬错误和软错误。
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公开(公告)号：US4964129A
公开(公告)日：1990-10-16
申请号：US287927
申请日：1988-12-21
CPC分类号： G06F11/106 , G06F11/073 , G06F11/0772 , G06F11/079
摘要： In accordance with the present invention, there is provided a system for logging an error that occurred in a multi-chip memory storage device in a data processing system. The system has a mechanism for detecting an error and for receiving data and check bits associated therewith. The mechanism for detecting an error generates syndrome bits as a function of the data and of the check bits. Connected to the error detecting mechanism is an error logging mechanism which is adapted to receive the syndrome bits and to determine the chip in which the error occurred.
摘要翻译： 根据本发明，提供了一种用于记录在数据处理系统中的多芯片存储器存储装置中发生的错误的系统。 该系统具有用于检测错误并用于接收与其相关联的数据和校验位的机制。 用于检测错误的机制产生作为数据和校验位的函数的校正子位。 连接到错误检测机制的是错误记录机制，其适于接收校正子位并确定发生错误的芯片。
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