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公开(公告)号：US12113587B2
公开(公告)日：2024-10-08
申请号：US17506725
申请日：2021-10-21
发明人： Hsuan-Ting Ho , Liang-Wei Huang , Wei-Chiang Hsu , Wei-Jyun Wang
CPC分类号： H04B3/23 , H03M1/001 , H03M1/0854
摘要： A digital-to-analog converter circuit generates an analog transmitted signal according to a digital transmitted signal. A first echo canceller circuit generates a first echo cancelling signal according to the digital transmitted signal. A processor circuit generates an analog processed signal according to the analog transmitted signal, the first echo cancelling signal, and a received signal. An analog-to-digital converter circuit generates a digital value according to the analog processed signal and two slicer levels of a plurality of slicer levels. A storage circuit stores a look-up table. The look-up table records an offset value corresponding to the digital value. The storage circuit further outputs a first output signal according to the digital value and the offset value. The offset value is updated according to an error value associated with the first output signal.
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公开(公告)号：US20220337286A1
公开(公告)日：2022-10-20
申请号：US17506725
申请日：2021-10-21
发明人： Hsuan-Ting Ho , Liang-Wei Huang , Wei-Chiang Hsu , Wei-Jyun Wang
摘要： A digital-to-analog converter circuit generates an analog transmitted signal according to a digital transmitted signal. A first echo canceller circuit generates a first echo cancelling signal according to the digital transmitted signal. A processor circuit generates an analog processed signal according to the analog transmitted signal, the first echo cancelling signal, and a received signal. An analog-to-digital converter circuit generates a digital value according to the analog processed signal and two slicer levels of a plurality of slicer levels. A storage circuit stores a look-up table. The look-up table records an offset value corresponding to the digital value. The storage circuit further outputs a first output signal according to the digital value and the offset value. The offset value is updated according to an error value associated with the first output signal.
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