ECHO CANCELLING SYSTEM AND ECHO CANCELLING METHOD

    公开(公告)号:US20220337286A1

    公开(公告)日:2022-10-20

    申请号:US17506725

    申请日:2021-10-21

    IPC分类号: H04B3/23 H03M1/00 H03M1/08

    摘要: A digital-to-analog converter circuit generates an analog transmitted signal according to a digital transmitted signal. A first echo canceller circuit generates a first echo cancelling signal according to the digital transmitted signal. A processor circuit generates an analog processed signal according to the analog transmitted signal, the first echo cancelling signal, and a received signal. An analog-to-digital converter circuit generates a digital value according to the analog processed signal and two slicer levels of a plurality of slicer levels. A storage circuit stores a look-up table. The look-up table records an offset value corresponding to the digital value. The storage circuit further outputs a first output signal according to the digital value and the offset value. The offset value is updated according to an error value associated with the first output signal.

    Control circuit of pipeline ADC
    2.
    发明授权

    公开(公告)号:US11476864B2

    公开(公告)日:2022-10-18

    申请号:US17410382

    申请日:2021-08-24

    摘要: A control circuit of a pipeline analog-to-digital converter (ADC) is provided. The pipeline ADC includes a multiplying digital-to-analog converter (MDAC) which includes a capacitor. The control circuit includes six switches and two buffer circuits. The first and second switches are respectively coupled between one end of the capacitor and the first and second reference voltages. The output terminals of the first and second buffer circuits are respectively coupled to the first and second switches. The input terminal of the first buffer circuit is coupled to the third reference voltage through the third switch, or receives a control signal through the fifth switch. The input terminal of the second buffer circuit is coupled to the fourth reference voltage through the fourth switch, or receives the control signal through the sixth switch. The first and second reference voltages are different, and the first and second switches are not turned on simultaneously.

    Echo cancelling system and echo cancelling method

    公开(公告)号:US12113587B2

    公开(公告)日:2024-10-08

    申请号:US17506725

    申请日:2021-10-21

    IPC分类号: H04B3/23 H03M1/00 H03M1/08

    CPC分类号: H04B3/23 H03M1/001 H03M1/0854

    摘要: A digital-to-analog converter circuit generates an analog transmitted signal according to a digital transmitted signal. A first echo canceller circuit generates a first echo cancelling signal according to the digital transmitted signal. A processor circuit generates an analog processed signal according to the analog transmitted signal, the first echo cancelling signal, and a received signal. An analog-to-digital converter circuit generates a digital value according to the analog processed signal and two slicer levels of a plurality of slicer levels. A storage circuit stores a look-up table. The look-up table records an offset value corresponding to the digital value. The storage circuit further outputs a first output signal according to the digital value and the offset value. The offset value is updated according to an error value associated with the first output signal.

    Analog to digital conversion apparatus and method having quick conversion mechanism

    公开(公告)号:US11876526B2

    公开(公告)日:2024-01-16

    申请号:US17670536

    申请日:2022-02-14

    IPC分类号: H03M1/06 H03M1/08

    CPC分类号: H03M1/08

    摘要: The present invention discloses an analog to digital conversion (ADC) apparatus having quick conversion mechanism. Each of ADC circuits receives a previous higher-bit conversion result to perform prediction to generate a current higher-bit conversion result, performs conversion on an input analog signal according to a sampling clock that has a frequency at least twice of the frequency of the input analog signal based on a successive-approximation mechanism to generate a current lower-bit conversion result, and combines the current higher-bits and current lower-bit conversion results to generate a current conversion result and output a remained signal amount as a residue. A noise-shaping circuit performs calculation based on the residue to generate a noise-shaping reference signal. Each of the ADC circuits combines the current conversion result and the noise-shaping reference signal to generate an output digital signal.