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公开(公告)号：US20080273372A1
公开(公告)日：2008-11-06
申请号：US12178148
申请日：2008-07-23
IPC分类号： G11C11/00
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1625
摘要： A method of programming a multi-layer chalcogenide electronic device. The device includes an active region in electrical communication with two terminals, where the active region includes two or more layers. The method includes providing an electrical signal between the two terminals, where the electrical signal alters an electrical characteristic of a layer remote from one of the terminals. In one embodiment, the layer remote from the terminal is a chalcogenide material and the electrical characteristic is resistance. In another embodiment, an electrical characteristic of the layer in contact with the terminal is also altered. The alteration of an electrical characteristic may be caused by a transformation of a chalcogenide material from one structural state to another structural state.
摘要翻译： 一种编程多层硫族化物电子器件的方法。 该器件包括与两个端子电连通的有源区域，其中有源区域包括两层或更多层。 该方法包括在两个终端之间提供电信号，其中电信号改变远离一个终端的层的电特性。 在一个实施例中，远离终端的层是硫族化物材料，并且电特性是电阻。 在另一个实施例中，与终端接触的层的电特性也被改变。 电特性的改变可能是由硫族化物材料从一种结构状态转变为另一种结构状态引起的。
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公开(公告)号：US08000125B2
公开(公告)日：2011-08-16
申请号：US12178148
申请日：2008-07-23
IPC分类号： G11C11/00
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1625
摘要： A method of programming a multi-layer chalcogenide electronic device. The device includes an active region in electrical communication with two terminals, where the active region includes two or more layers. The method includes providing an electrical signal between the two terminals, where the electrical signal alters an electrical characteristic of a layer remote from one of the terminals. In one embodiment, the layer remote from the terminal is a chalcogenide material and the electrical characteristic is resistance. In another embodiment, an electrical characteristic of the layer in contact with the terminal is also altered. The alteration of an electrical characteristic may be caused by a transformation of a chalcogenide material from one structural state to another structural state.
摘要翻译： 一种编程多层硫族化物电子器件的方法。 该器件包括与两个端子电连通的有源区域，其中有源区域包括两层或更多层。 该方法包括在两个终端之间提供电信号，其中电信号改变远离其中一个终端的层的电特性。 在一个实施例中，远离终端的层是硫族化物材料，并且电特性是电阻。 在另一个实施例中，与终端接触的层的电特性也被改变。 电特性的改变可能是由硫族化物材料从一种结构状态转变为另一种结构状态引起的。
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公开(公告)号：US07767992B2
公开(公告)日：2010-08-03
申请号：US11451913
申请日：2006-06-13
IPC分类号： H01L29/02
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1625
摘要： A multi-layer chalcogenide electronic device. The device includes an active region in electrical communication with two terminals, where the active region includes two or more layers. In one embodiment, the pore region includes two or more chalcogenide materials which differ in chemical composition. In another embodiment, the pore region includes one or more chalcogenide materials and a layer of Sb. The devices offer the advantages of minimal conditioning requirements, fast set speeds, high reset resistances and low set resistances.
摘要翻译： 多层硫族化物电子器件。 该器件包括与两个端子电连通的有源区域，其中有源区域包括两层或更多层。 在一个实施方案中，孔区域包括化学组成不同的两种或更多种硫族化物材料。 在另一个实施方案中，孔区包括一种或多种硫族化物材料和一层Sb。 该器件具有最小的调理要求，快速设定速度，高复位电阻和低设定电阻的优点。
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4.发明申请Multi-layered chalcogenide and related devices having enhanced operational characteristics 审中-公开具有增强的操作特性的多层硫族化物和相关装置公开(公告)号：US20080042119A1
公开(公告)日：2008-02-21
申请号：US11821246
申请日：2007-06-22
申请人： Regino Sandoval , Wolodymyr Czubatyj , Tyler Lowrey , Isamu Asano
发明人： Regino Sandoval , Wolodymyr Czubatyj , Tyler Lowrey , Isamu Asano
IPC分类号： H01L47/00
CPC分类号： H01L45/1246 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1625
摘要： A multi-layer chalcogenide, memory or switching device. The device includes an active region disposed between a first terminal and a second terminal. The active region includes a first layer and a second layer, where one of the layers is a heterogeneous layer that includes an operational component and a promoter component. The other layer may be a homogeneous or heterogeneous layer. In exemplary embodiments, the operational component is a chalcogenide or phase change material and the promoter component is an insulating or dielectric material. Inclusion of the promoter component provides beneficial performance characteristics such as a reduction in reset current or minimization of formation requirements.
摘要翻译： 多层硫族化物，记忆体或开关装置。 该装置包括设置在第一端子和第二端子之间的有源区域。 有源区包括第一层和第二层，其中一层是包含可操作组分和促进剂组分的异质层。 另一层可以是均质或非均质层。 在示例性实施方案中，操作组分是硫族化物或相变材料，并且促进剂组分是绝缘或介电材料。 包含启动子组分提供了有益的性能特征，例如复位电流的降低或形成要求的最小化。
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公开(公告)号：US20080023685A1
公开(公告)日：2008-01-31
申请号：US11743459
申请日：2007-05-02
IPC分类号： H01L47/00
CPC分类号： H01L45/148 , H01L45/06 , H01L45/122 , H01L45/1233 , H01L45/1246 , H01L45/143 , H01L45/144
摘要： A memory device includes a phase-change material and a first electrode in electrical communication with the phase-change material. Also included is a second electrode in electrical communication with the phase-change material and a dielectric layer. The dielectric layer is disposed between the first electrode and the second electrode. The dielectric layer has an opening therethrough. The phase-change material is disposed on both sides of the dielectric layer and within the opening. Electrical communication within the device is by means of virtual contacts.
摘要翻译： 存储器件包括相变材料和与相变材料电连通的第一电极。 还包括与相变材料和介电层电连通的第二电极。 介电层设置在第一电极和第二电极之间。 电介质层具有通过其的开口。 相变材料设置在电介质层的两侧和开口内。 设备内的电气通信是通过虚拟接触。
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公开(公告)号：US20090298222A1
公开(公告)日：2009-12-03
申请号：US12154952
申请日：2008-05-28
申请人： Tyler Lowrey , Jeff Fournier , Robert Nuss , Carl Schell , Guy Wicker , Jim Ricker , James Reed , Ed Spall , Sergey Kostylev , Wolodymyr Czubatyj , Regino Sandoval
发明人： Tyler Lowrey , Jeff Fournier , Robert Nuss , Carl Schell , Guy Wicker , Jim Ricker , James Reed , Ed Spall , Sergey Kostylev , Wolodymyr Czubatyj , Regino Sandoval
IPC分类号： H01L45/00
CPC分类号： H01L45/06 , H01L45/04 , H01L45/144 , H01L45/1608
摘要： A method of chalcogenide device formation includes treatment of the surface upon which the chalcogenide material is deposited. The treatment reduces or eliminates native oxides and other contaminants from the surface, thereby increasing the adhesion of the chalcogenide layer to the treated surface, eliminating voids between the chalcogenide layer and deposition surface and reducing the degradation of chalcogenide material due to the migration of contaminants into the chalcogenide.
摘要翻译： 硫族化物器件形成的方法包括处理沉积硫族化物材料的表面。 该处理减少或消除了表面的天然氧化物和其他污染物，从而增加了硫属化物层与处理过的表面的粘附性，消除了硫属化物层与沉积表面之间的空隙，并且由于污染物的迁移而降低了硫族化物材料的降解 硫族化物。
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公开(公告)号：US20070034849A1
公开(公告)日：2007-02-15
申请号：US11451913
申请日：2006-06-13
IPC分类号： H01L29/02
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1625
摘要： A multi-layer chalcogenide electronic device. The device includes an active region in electrical communication with two terminals, where the active region includes two or more layers. In one embodiment, the pore region includes two or more chalcogenide materials which differ in chemical composition. In another embodiment, the pore region includes one or more chalcogenide materials and a layer of Sb. The devices offer the advantages of minimal conditioning requirements, fast set speeds, high reset resistances and low set resistances.
摘要翻译： 多层硫族化物电子器件。 该器件包括与两个端子电连通的有源区域，其中有源区域包括两层或更多层。 在一个实施方案中，孔区域包括化学组成不同的两种或更多种硫族化物材料。 在另一个实施方案中，孔区包括一种或多种硫族化物材料和一层Sb。 该器件具有最小的调理要求，快速设定速度，高复位电阻和低设定电阻的优点。
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8.发明申请Chalcogenide Devices Exhibiting Stable Operation from the As-Fabricated State 审中-公开从制造国展示稳定运行的硫族化物装置公开(公告)号：US20100321991A1
公开(公告)日：2010-12-23
申请号：US12871975
申请日：2010-08-31
IPC分类号： G11C11/00
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1625
摘要： A chalcogenide material and chalcogenide memory device having less stringent requirements for formation, improved thermal stability and/or faster operation. The chalcogenide materials include materials comprising Ge, Sb and Te in which the Ge and/or Te content is lean relative to the commonly used Ge2Sb2Te5 chalcogenide composition. Electrical devices containing the instant chalcogenide materials show a rapid convergence of the set resistance during cycles of setting and resetting the device from its as-fabricated state, thus leading to a reduced or eliminated need to subject the device to post-fabrication electrical formation prior to end-use operation. Improved thermal stability is manifested in terms of prolonged stability of the resistance of the device at elevated temperatures, which leads to an inhibition of thermally induced setting of the reset state in the device. Significant improvements in the 10 year data retention temperature are demonstrated. Faster device operation is achieved through an increased speed of crystallization, which acts to shorten the time required to transform the chalcogenide material from its reset state to its set state in an electrical memory device.
摘要翻译： 一种硫族化物材料和硫族化物记忆装置，其对形成，改进的热稳定性和/或更快的操作要求不太严格。 硫属化物材料包括Ge，Sb和Te的材料，其中Ge和/或Te含量相对于通常使用的Ge 2 Sb 2 Te 5硫族化物组合物是稀的。 包含瞬时硫族化物材料的电气装置显示设定循环期间的设定电阻的快速收敛以及将器件从其制造状态复位，从而导致减少或消除了将器件置于后制造电形成之前 最终使用操作。 改进的热稳定性表现在器件在升高的温度下的电阻的延长的稳定性，这导致抑制器件中复位状态的热诱导设置。 展示了10年数据保存温度的显着改进。 通过提高结晶速度实现更快的器件操作，其用于缩短将硫族化物材料从其复位状态转换到其在电存储器件中的设定状态所需的时间。
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9.发明授权Chalcogenide devices and materials having reduced germanium or telluruim content 有权硫族化物装置和具有降低的锗或碲化物含量的材料公开(公告)号：US07525117B2
公开(公告)日：2009-04-28
申请号：US11301211
申请日：2005-12-12
IPC分类号： H01L29/02
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1625
摘要： A chalcogenide material and memory device exhibiting fast operation over an extended range of reset state resistances. Electrical devices containing the chalcogenide materials permit rapid transformations from the reset state to the set state for reset and set states having a high resistance ratio. The devices provide for high resistance contrast of memory states while preserving fast operational speeds. The chalcogenide materials include Ge, Sb and Te where the Ge and/or Te content is lean relative to Ge2Sb2Te5. In one embodiment, the concentration of Ge is between 11% and 22%, the concentration of Sb is between 22% and 65%, and the concentration of Te is between 28% and 55%. In a preferred embodiment, the concentration of Ge is between 15% and 18%, the concentration of Sb is between 32% and 35%, and the concentration of Te is between 48% and 51%.
摘要翻译： 在扩展的复位状态电阻范围内呈现快速操作的硫族化物材料和存储器件。 含有硫族化物材料的电气装置允许从复位状态到设定状态的快速转换以及具有高电阻比的设定状态。 这些器件提供高电阻对比度的存储器状态，同时保持快速的操作速度。 硫族化物材料包括Ge，Sb和Te，其中Ge和/或Te含量相对于Ge 2 Sb 2 Te 5是贫的。 在一个实施方案中，Ge的浓度为11％至22％，Sb的浓度为22％至65％，Te的浓度为28％至55％。 在优选的实施方案中，Ge的浓度为15％至18％，Sb的浓度为32％至35％，Te的浓度为48％至51％。
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10.发明授权公开(公告)号：US07327602B2
公开(公告)日：2008-02-05
申请号：US10960263
申请日：2004-10-07
IPC分类号： G11C11/00
CPC分类号： G11C13/0069 , G11C13/0004 , G11C29/50 , G11C2013/0078 , G11C2013/0092
摘要： A method of testing a programmable resistance memory element. The method includes applying a plurality of reset pulses to the memory element. Each of the reset pulses having an energy which is greater than the minimum energy needed to program the memory element from its set state to its reset state.
摘要翻译： 一种测试可编程电阻存储元件的方法。 该方法包括将多个复位脉冲施加到存储元件。 每个复位脉冲具有大于将存储器元件从其设置状态编程到其复位状态所需的最小能量的能量。
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