公开(公告)号：US20080174349A1

公开(公告)日：2008-07-24

申请号：US12016335

申请日：2008-01-18

申请人： Ren-Hong Luo ,  Cheng-Ta Wei

发明人： Ren-Hong Luo ,  Cheng-Ta Wei

IPC分类号： H03L7/095 ,  H03L7/085 ,  H03L7/08

CPC分类号： H03L7/095 ,  H03L7/193

摘要： A wide-locking range phase locked loop circuit includes a decision unit and a closed loop connection comprising a phase frequency detector, a charge pump, a loop filter, a voltage controlled oscillator, and a multi-modulus divider. The decision unit receives a phase difference signal outputted from phase frequency detector and the control voltage outputted from the loop filter and determines to select a specific divisor form the plurality of divisors provided by the multi-modulus divider if the phase difference signal indicates an unlocked state and the control voltage is not within a standard voltage operation range.

摘要翻译： 宽锁定范围锁相环电路包括判决单元和包括相位频率检测器，电荷泵，环路滤波器，压控振荡器和多模式分频器的闭环连接。 决定单元接收从相位频率检测器输出的相位差信号和从环路滤波器输出的控制电压，并且如果相位差信号指示解锁状态，则确定选择由多模式分频器提供的多个除数的特定除数 并且控制电压不在标准电压工作范围内。

公开(公告)号：US07564281B2

公开(公告)日：2009-07-21

申请号：US12016335

申请日：2008-01-18

申请人： Ren-Hong Luo ,  Cheng-Ta Wei

发明人： Ren-Hong Luo ,  Cheng-Ta Wei

IPC分类号： H03L7/06

CPC分类号： H03L7/095 ,  H03L7/193

摘要： A wide-locking range phase locked loop circuit includes a decision unit and a closed loop connection comprising a phase frequency detector, a charge pump, a loop filter, a voltage controlled oscillator, and a multi-modulus divider. The decision unit receives a phase difference signal outputted from phase frequency detector and the control voltage outputted from the loop filter and determines to select a specific divisor form the plurality of divisors provided by the multi-modulus divider if the phase difference signal indicates an unlocked state and the control voltage is not within a standard voltage operation range.

摘要翻译： 宽锁定范围锁相环电路包括判决单元和包括相位频率检测器，电荷泵，环路滤波器，压控振荡器和多模式分频器的闭环连接。 决定单元接收从相位频率检测器输出的相位差信号和从环路滤波器输出的控制电压，并且如果相位差信号指示解锁状态，则确定选择由多模式分频器提供的多个除数的特定除数 并且控制电压不在标准电压工作范围内。

公开(公告)号：US20110156777A1

公开(公告)日：2011-06-30

申请号：US12859957

申请日：2010-08-20

申请人： Cheng-Ta Wei ,  Ming-Shih Yu

发明人： Cheng-Ta Wei ,  Ming-Shih Yu

IPC分类号： H03L7/06

CPC分类号： H03L7/093 ,  H03L7/0807 ,  H03L7/099

摘要： A clock and data recovery circuit includes a phase detector, a charge pump, a loop filter, a voltage-controlled oscillator and a frequency divider. The voltage-controlled oscillator includes a current mirror, a control circuit, a current modulation module and a current-controlled oscillator. The current mirror has a current-controlling path and a current-outputting path. The current-controlling path and the current-outputting path are in a proportional relationship. The control circuit is used for adjusting the current flowing through the current-controlling path according to the control voltage. The current modulation module is used for generating a differential current according to the judging signal. The current-controlled oscillator is used for adjusting the phase of the second output clock signal according to the sum of the differential current and the current flowing through the current-outputting path.

摘要翻译： 时钟和数据恢复电路包括相位检测器，电荷泵，环路滤波器，压控振荡器和分频器。 压控振荡器包括电流镜，控制电路，电流调制模块和电流控制振荡器。 电流镜具有电流控制路径和电流输出路径。 电流控制路径和电流输出路径成比例关系。 控制电路用于根据控制电压调节流过电流控制路径的电流。 当前调制模块用于根据判断信号产生差分电流。 电流控制振荡器用于根据差分电流和流过电流输出路径的电流之和调整第二输出时钟信号的相位。

公开(公告)号：US06403992B1

公开(公告)日：2002-06-11

申请号：US09945290

申请日：2001-08-30

申请人： Cheng-Ta Wei

发明人： Cheng-Ta Wei

IPC分类号： H01L2710

CPC分类号： H01L27/0222 ,  H01L27/0922

摘要： A complementary metal-oxide semiconductor (CMOS) device, employing circuit conversion to achieve coexistent multiple voltage levels without body effect. The CMOS device, formed by a typical twin-well process, has a high voltage CMOS, a low voltage CMOS and a circuit converter. The circuit converter raises the operation voltage of the low voltage PMOS in the low voltage CMOS (in the N-type substrate) up to that of the high voltage PMOS in the high voltage CMOS. Alternatively, the circuit converter reduces the operation voltage of the low voltage NMOS in the low voltage CMOS to that of the high voltage NMOS in the high voltage CMOS. Thus, the body effect does not occur to the CMOS device.

摘要翻译： 一种互补金属氧化物半导体（CMOS）器件，采用电路转换实现共同的多电压电平无身体效应。 由典型的双阱工艺形成的CMOS器件具有高电压CMOS，低电压CMOS和电路转换器。 电路转换器将低压CMOS（在N型衬底中）的低压PMOS的工作电压提高到高电压CMOS中的高电压PMOS的工作电压。 或者，电路转换器将低电压CMOS中的低电压NMOS的操作电压降低到高电压CMOS中的高压NMOS的工作电压。 因此，CMOS器件不会发生器体效应。

公开(公告)号：US08067965B2

公开(公告)日：2011-11-29

申请号：US12859957

申请日：2010-08-20

申请人： Cheng-Ta Wei ,  Ming-Shih Yu

发明人： Cheng-Ta Wei ,  Ming-Shih Yu

IPC分类号： H03L7/06

CPC分类号： H03L7/093 ,  H03L7/0807 ,  H03L7/099

摘要： A clock and data recovery circuit includes a phase detector, a charge pump, a loop filter, a voltage-controlled oscillator and a frequency divider. The voltage-controlled oscillator includes a current mirror, a control circuit, a current modulation module and a current-controlled oscillator. The current mirror has a current-controlling path and a current-outputting path. The current-controlling path and the current-outputting path are in a proportional relationship. The control circuit is used for adjusting the current flowing through the current-controlling path according to the control voltage. The current modulation module is used for generating a differential current according to the judging signal. The current-controlled oscillator is used for adjusting the phase of the second output clock signal according to the sum of the differential current and the current flowing through the current-outputting path.

摘要翻译： 时钟和数据恢复电路包括相位检测器，电荷泵，环路滤波器，压控振荡器和分频器。 压控振荡器包括电流镜，控制电路，电流调制模块和电流控制振荡器。 电流镜具有电流控制路径和电流输出路径。 电流控制路径和电流输出路径成比例关系。 控制电路用于根据控制电压调节流过电流控制路径的电流。 当前调制模块用于根据判断信号产生差分电流。 电流控制振荡器用于根据差分电流和流过电流输出路径的电流之和调整第二输出时钟信号的相位。