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    Semiconductor device
    3.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US09401413B2

    公开(公告)日：2016-07-26

    申请号：US14193780

    申请日：2014-02-28

    Applicant: Renesas Electronics Corporation

    Inventor： Yasuhiro Murase

    IPC: H01L21/02 ,  H01L29/66 ,  H01L29/778 ,  H01L29/207 ,  H01L29/20 ,  H01L29/06 ,  H01L29/10

    CPC classification number: H01L29/7783 ,  H01L29/0619 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/207 ,  H01L29/66462 ,  H01L29/7787

    Abstract: The semiconductor device has a barrier layer formed on a channel layer, an n type diffusion preventing layer formed on the barrier layer and containing aluminum, and a source electrode and a drain electrode formed on the diffusion preventing layer. The semiconductor device further has a p type cap layer formed on the diffusion preventing layer sandwiched between the source electrode and the drain electrode and a gate electrode formed on the cap layer. The diffusion preventing layer has an aluminum composition ratio greater than the aluminum composition ratio of the barrier layer.

    Abstract translation: 半导体器件具有形成在沟道层上的阻挡层，形成在阻挡层上并含有铝的n型扩散防止层，以及形成在扩散防止层上的源电极和漏电极。 该半导体器件还具有形成在该源极电极和漏极电极之间的扩散防止层上形成的p型覆盖层，以及形成在盖层上的栅电极。 扩散防止层的铝组成比大于阻挡层的铝组成比。

    FIELD EFFECT TRANSISTOR, AND MULTILAYERED EPITAXIAL FILM FOR USE IN PREPARATION OF FIELD EFFECT TRANSISTOR
    4.
    发明申请
    FIELD EFFECT TRANSISTOR, AND MULTILAYERED EPITAXIAL FILM FOR USE IN PREPARATION OF FIELD EFFECT TRANSISTOR 有权
    场效应晶体管和用于制备场效应晶体管的多层外延膜

    公开(公告)号：US20140367743A1

    公开(公告)日：2014-12-18

    申请号：US14470403

    申请日：2014-08-27

    Applicant: Renesas Electronics Corporation

    Inventor： Takashi Inoue ,  Tatsuo Nakayama ,  Yuji Ando ,  Yasuhiro Murase ,  Kazuki Ota ,  Hironobu Miyamoto ,  Katsumi Yamanoguchi ,  Naotaka Kuroda ,  Akio Wakejima ,  Yasuhiro Okamoto

    IPC: H01L29/778 ,  H01L29/205 ,  H01L29/06 ,  H01L29/20

    CPC classification number: H01L29/7783 ,  H01L29/0607 ,  H01L29/155 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/42316 ,  H01L29/7787

    Abstract: In a group III nitride-type field effect transistor, the present invention reduces a leak current component by conduction of residual carriers in a buffer layer, and achieves improvement in a break-down voltage, and enhances a carrier confinement effect (carrier confinement) of a channel to improve pinch-off characteristics (to suppress a short channel effect). For example, when applying the present invention to a GaN-type field effect transistor, besides GaN of a channel layer, a composition-modulated (composition-gradient) AlGaN layer in which aluminum composition reduces toward a top gradually or stepwise is used as a buffer layer (hetero buffer). To gate length Lg of a FET to be prepared, a sum a of layer thicknesses of an electron supply layer and a channel layer is selected so as to fulfill Lg/a≧5, and in such a case, the layer thickness of the channel layer is selected in a range of not exceeding 5 times (about 500 Å) as long as a de Broglie wavelength of two-dimensional electron gas accumulated in the channel layer in room temperature.

    Abstract translation: 在III族氮化物型场效应晶体管中，本发明通过缓冲层中的残留载流子的传导来减少漏电流成分，并且可以实现击穿电压的提高，并且提高了载流子限制效应（载流子限制） 提高夹断特性的通道（抑制短路效应）。 例如，当将本发明应用于GaN型场效应晶体管时，除了沟道层的GaN之外，使用其中铝组成逐渐或逐步朝向顶部的组分调制（组成梯度）AlGaN层用作 缓冲层（杂质缓冲液）。 对于要制备的FET的栅极长度Lg，选择电子供给层和沟道层的层厚度的和a以满足Lg /a≥5，并且在这种情况下，沟道的层厚度 只要在室温下积聚在通道层中的二维电子气的德布罗意波长，不超过5倍（约500）的范围内选择层。

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