公开(公告)号：US20140329476A1

公开(公告)日：2014-11-06

申请号：US14258246

申请日：2014-04-22

申请人： Renesas Electronics Corporation ,  Renesas Electronics Corporation

发明人： Shintaro YAMAMICHI ,  Hirokazu HONDA ,  Masaki WATANABE ,  Junichi ARITA ,  Norio OKADA ,  Jun UENO ,  Masashi NISHIMOTO ,  Michitaka KIMURA ,  Tomohiro NISHIYAMA

IPC分类号： H04B1/38 ,  H04B1/40 ,  H04W84/18

CPC分类号： H04W84/18 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/49111 ,  H01L2924/00014 ,  H01L2924/00

摘要： A compact electronic device as a constituent element of a wireless communication system using a sensor. A first feature of the device is that a first semiconductor chip is bare-chip-mounted over a front surface of a first wiring board in the form of a chip and a second semiconductor chip is bare-chip-mounted over a second wiring board in the form of a chip. A second feature is that a wireless communication unit and a data processing unit which configure a module are separately mounted. A third feature is that the first and second wiring boards are stacked in the board thickness direction to make up the module (electronic device).

摘要翻译： 作为使用传感器的无线通信系统的组成要素的小型电子设备。 该器件的第一个特征是第一半导体芯片以芯片的形式裸地安装在第一布线板的前表面上，并且第二半导体芯片裸地安装在第二布线板上 芯片的形式。 第二特征是分别安装配置模块的无线通信单元和数据处理单元。 第三特征是第一和第二布线板沿板厚度方向堆叠以组成模块（电子设备）。

公开(公告)号：US20200098679A1

公开(公告)日：2020-03-26

申请号：US16547294

申请日：2019-08-21

申请人： RENESAS ELECTRONICS CORPORATION

发明人： Yoshiaki SATO ,  Yoshinori MIYAKI ,  Junichi ARITA

IPC分类号： H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78

摘要： An object of the present invention is to improve manufacturing efficiency of a semiconductor device. The method of manufacturing a semiconductor device includes a sealing step of sealing a semiconductor chip mounted on the wiring substrate. The sealing step includes a step of arranging the wiring substrate between an upper mold and a lower mold, suctioning a lower surface of the wiring substrate with the plurality of suction holes, thereby holding the wiring substrate the upper mold, and a step of sealing the semiconductor chip, an upper surface of the wiring substrate, and the plurality of side surfaces of the wiring substrate such that each of the semiconductor chip, the upper surface of the wiring substrate, and the plurality of side surfaces of the wiring substrate is covered with the resin in the lower mold.