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    Method and apparatus for performing sequential executions of elements in cooperation with a transform
    2.
    发明授权
    Method and apparatus for performing sequential executions of elements in cooperation with a transform 有权
    用于与变换协作执行元素的连续执行的方法和装置

    公开(公告)号：US06715064B1

    公开(公告)日：2004-03-30

    申请号：US09489072

    申请日：2000-01-21

    申请人： Reynold V. D'Sa ,  Slade A. Morgan ,  Alan B. Kyker ,  Gad S. Sheaffer ,  Gustavo P. Espinosa

    发明人： Reynold V. D'Sa ,  Slade A. Morgan ,  Alan B. Kyker ,  Gad S. Sheaffer ,  Gustavo P. Espinosa

    IPC分类号： G06F1500

    CPC分类号： G06F9/3848

    摘要： A method and apparatus for predicting the outcome of a branch instruction based on the branch history of preceding branch instruction. As a sequence of instructions passes through an instruction execution pipeline, a base branch instruction is chosen, a history index is generated for the base branch instruction and subsequent branch instructions, and a transform is created for the branch instruction to be predicted. When the sequence of instructions subsequently passes through the pipeline again, the transform is used to operate on the history index of the base branch instruction to produce a history index for the branch to be predicted. The result is used as an index into a prediction array to access the prediction logic for the branch instruction being predicted. By using the predetermined transform, a branch status prediction can be made before the branch to be predicted reaches the normal prediction stage in the pipeline.

    摘要翻译： 一种基于前一分支指令的分支历史来预测分支指令的结果的方法和装置。 当指令序列通过指令执行流水线时，选择基本分支指令，为基本分支指令和后续分支指令生成历史索引，并为要预测的分支指令创建变换。 当指令序列随后再次通过流水线时，变换用于对基本分支指令的历史索引进行操作，以产生要预测的分支的历史索引。 将结果用作预测数组的索引，以访问正在预测的分支指令的预测逻辑。 通过使用预定的变换，可以在待预测的分支到达正常的预测阶段之前进行分支状态预测。

    ACCESSING PRIVATE DATA ABOUT THE STATE OF A DATA PROCESSING MACHINE FROM STORAGE THAT IS PUBLICLY ACCESSIBLE
    4.
    发明申请
    ACCESSING PRIVATE DATA ABOUT THE STATE OF A DATA PROCESSING MACHINE FROM STORAGE THAT IS PUBLICLY ACCESSIBLE 审中-公开
    访问私人数据关于数据处理机器的状态，从存储可以访问的存储

    公开(公告)号：US20130275772A1

    公开(公告)日：2013-10-17

    申请号：US13836863

    申请日：2013-03-15

    申请人： Scott H. Robinson ,  Gustavo P. Espinosa ,  Steven M. Bennett

    发明人： Scott H. Robinson ,  Gustavo P. Espinosa ,  Steven M. Bennett

    IPC分类号： G06F12/14

    CPC分类号： G06F12/1408 ,  G06F21/71 ,  G06F21/78

    摘要： According to an embodiment of the invention, a method for operating a data processing machine is described in which data about a state of the machine is written to a location in storage. The location is one that is accessible to software that may be written for the machine. The state data as written is encoded. This state data may be recovered from the storage according to a decoding process. Other embodiments are also described and claimed.

    摘要翻译： 根据本发明的实施例，描述了一种用于操作数据处理机器的方法，其中关于机器状态的数据被写入存储器中的位置。 该位置是可以为机器编写的软件可访问的位置。 写入的状态数据被编码。 该状态数据可以根据解码处理从存储器恢复。 还描述和要求保护其他实施例。

    Method and apparatus for dynamic processor configuration by limiting a processor array pointer
    5.
    发明授权
    Method and apparatus for dynamic processor configuration by limiting a processor array pointer 有权
    通过限制处理器阵列指针来进行动态处理器配置的方法和装置

    公开(公告)号：US06766449B2

    公开(公告)日：2004-07-20

    申请号：US09749662

    申请日：2000-12-28

    申请人： Gustavo P. Espinosa ,  Meera Agrawal ,  Kjeld Svendsen ,  Bryan C. Tipton

    发明人： Gustavo P. Espinosa ,  Meera Agrawal ,  Kjeld Svendsen ,  Bryan C. Tipton

    IPC分类号： G06F124

    CPC分类号： G06F9/345 ,  G06F15/7867

    摘要： A method and system provides for changing processor configuration during operation of the processor system. The method and system include a control logic circuit where the control logic circuit sets a control bit to change the size of a processor array that allows disabling (defeaturing) of at least a portion of the array and enabling of a different performance operating mode for the processor system.

    摘要翻译： 一种方法和系统提供在处理器系统的操作期间改变处理器配置。 该方法和系统包括控制逻辑电路，其中控制逻辑电路设置控制位以改变处理器阵列的大小，该处理器阵列允许阵列的至少一部分的禁用（去除），并使能不同的性能操作模式 处理器系统。

    Accessing private data about the state of a data processing machine from storage that is publicly accessible
    7.
    发明授权
    Accessing private data about the state of a data processing machine from storage that is publicly accessible 有权
    从可公开访问的存储区访问有关数据处理机状态的私有数据

    公开(公告)号：US08156343B2

    公开(公告)日：2012-04-10

    申请号：US10724321

    申请日：2003-11-26

    申请人： Scott H. Robinson ,  Gustavo P. Espinosa ,  Steven M. Bennett

    发明人： Scott H. Robinson ,  Gustavo P. Espinosa ,  Steven M. Bennett

    IPC分类号： G06F11/30

    CPC分类号： G06F12/1408 ,  G06F21/71 ,  G06F21/78

    摘要： According to an embodiment of the invention, a method for operating a data processing machine is described in which data about a state of the machine is written to a location in storage. The location is one that is accessible to software that may be written for the machine. The state data as written is encoded. This state data may be recovered from the storage according to a decoding process. Other embodiments are also described and claimed.

    摘要翻译： 根据本发明的实施例，描述了一种用于操作数据处理机器的方法，其中关于机器状态的数据被写入存储器中的位置。 该位置是可以为机器编写的软件可访问的位置。 写入的状态数据被编码。 该状态数据可以根据解码处理从存储器恢复。 还描述和要求保护其他实施例。

    System and method for optimizing memory bus bandwidth utilization by request classification and ordering
    8.
    发明授权
    System and method for optimizing memory bus bandwidth utilization by request classification and ordering 有权
    通过请求分类和排序优化内存总线带宽利用率的系统和方法

    公开(公告)号：US06772293B2

    公开(公告)日：2004-08-03

    申请号：US09748979

    申请日：2000-12-27

    申请人： Ramacharan Sundararaman ,  Gustavo P. Espinosa ,  JunSeong Kim ,  Ryan L. Carlson

    发明人： Ramacharan Sundararaman ,  Gustavo P. Espinosa ,  JunSeong Kim ,  Ryan L. Carlson

    IPC分类号： G06F1200

    CPC分类号： G06F12/0897

    摘要： Mechanisms for improving the efficiency of bus-request scheduling are provided. In a read-write segregation mechanism the type of a selected entry in a buffer is determined. If the type of the selected entry matches the type of the last issued entry, or if there are no further entries in the buffer that match the last issued entry, the request is issued to the system bus. A temporal ordering mechanism associates a request sent to a buffer with an identifier, the identifier designating a time at which the request was originally generated. The request identifier is modified when a prior request is issued, and thereby reflects a history of prior issuances. A request is issued when the historical information recorded in the identifier indicates that the request is the earliest-issued pending request in the buffer. A third mechanism for increasing the efficiency of bus request scheduling in a buffer includes segregating lower priority cache eviction requests in a separate write-out section of the buffer. Request entries in the write-out section are issued to a system bus only when there are no pending entries in a bus queue.

    摘要翻译： 提供了提高总线请求调度效率的机制。 在读写分离机制中，确定缓冲区中所选条目的类型。 如果所选条目的类型与最后发出的条目的类型匹配，或者如果缓冲区中没有与最后发出的条目匹配的进一步条目，则将该请求发送到系统总线。 时间排序机制将发送到缓冲器的请求与标识符相关联，标识符指定最初生成请求的时间。 当发出先前请求时，修改请求标识符，从而反映先前发行的历史。 当记录在标识符中的历史信息指示该请求是缓冲器中最早发出的等待请求时，发出请求。 用于提高缓冲器中的总线请求调度的效率的第三种机制包括在缓冲器的单独的写出部分中隔离较低优先级的高速缓存驱逐请求。 仅当总线队列中没有挂起的条目时，才将写入部分中的请求条目发布到系统总线。