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公开(公告)号:US20060267078A1
公开(公告)日:2006-11-30
申请号:US11141254
申请日:2005-05-31
申请人: Ricardo Mikalo , Erwin Schroer , Gunther Wein , Jens-Uwe Sachse , Mark Isler , Jan-Malte Schley , Christoph Kleint
发明人: Ricardo Mikalo , Erwin Schroer , Gunther Wein , Jens-Uwe Sachse , Mark Isler , Jan-Malte Schley , Christoph Kleint
IPC分类号: H01L29/788 , H01L21/336
CPC分类号: H01L29/792 , H01L27/115 , H01L27/11568 , H01L29/66833
摘要: An oxidized region is arranged between a substrate of semiconductor material and a nitride liner, which covers wordline stacks of a memory cell array and intermediate areas of the substrate, and is provided to separate the nitride liner both from the substrate and from a memory layer sequence of dielectric materials that is provided for charge-trapping. The nitride liner is used as an etching stop layer in the formation of sidewall spacers used in a peripheral area to produce source/drain junctions of transistors of the addressing circuitry.
摘要翻译: 氧化区域布置在半导体材料的衬底和氮化物衬垫之间,其覆盖存储单元阵列的字线堆叠和衬底的中间区域,并且被提供以将氮化物衬垫与衬底和存储器层序列分离 的电介质材料,用于电荷捕获。 氮化物衬垫在形成用于外围区域的侧壁间隔物中用作蚀刻停止层,以产生寻址电路的晶体管的源极/漏极结。
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公开(公告)号:US20060223267A1
公开(公告)日:2006-10-05
申请号:US11095925
申请日:2005-03-31
申请人: Stefan Machill , Christoph Ludwig , Jan-Malte Schley , Gunther Wein , Jens-Uwe Sachse , Mathias Krause , Mark Isler , Joachim Deppe
发明人: Stefan Machill , Christoph Ludwig , Jan-Malte Schley , Gunther Wein , Jens-Uwe Sachse , Mathias Krause , Mark Isler , Joachim Deppe
IPC分类号: H01L21/336
CPC分类号: H01L27/11568 , H01L27/105 , H01L27/11573 , H01L29/40117
摘要: The surfaces of wordline stacks and intermediate areas of a main substrate surface are covered with an oxynitride liner. Either sidewall spacers of BPSG are formed or a further liner of nitride is deposited and spacers of oxide are formed. These spacers are used in a peripheral area of addressing circuitry to implant doped source/drain regions. The oxynitride reduces the stress between the nitride and the semiconductor material and prevents charge carriers from penetrating out of a memory layer of nitride into the liner.
摘要翻译: 主衬底表面的字线堆叠和中间区域的表面被氧氮化物衬垫覆盖。 形成BPSG的侧壁间隔物,或者沉积另外的氮化物衬垫,并形成氧化物的间隔物。 这些间隔物用于寻址电路的外围区域以注入掺杂的源极/漏极区域。 氧氮化物降低了氮化物和半导体材料之间的应力,并且防止电荷载流子从氮化物的存储层渗透到衬里中。
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公开(公告)号:US20060205148A1
公开(公告)日:2006-09-14
申请号:US11078647
申请日:2005-03-11
申请人: Joachim Deppe , Mathias Krause , Christoph Kleint , Christoph Ludwig , Jens-Uwe Sachse , Gunther Wein
发明人: Joachim Deppe , Mathias Krause , Christoph Kleint , Christoph Ludwig , Jens-Uwe Sachse , Gunther Wein
IPC分类号: H01L21/336 , H01L21/3205 , H01L21/8238
CPC分类号: H01L21/28282 , H01L29/4234 , H01L29/792
摘要: A non-volatile semiconductor memory (30) comprising a semiconductor substrate (1) and a plurality of memory cells (19) and methods for manufacturing such a memory is provided. Each memory cell (19) comprises a charge-trapping element (5), a gate stack (20), nitride spacers (10) and electrically insulating elements (21). The charge-trapping element (5) is arranged on the semiconductor substrate (1) and comprises a nitride layer (3) sandwiched between a bottom oxide layer (2) and a top oxide layer (4), the charge-trapping element (5) having two lateral sidewalls (24) opposed to one another. The gate stack (20) is arranged on top of the charge-trappinig element (5), the gate stack having two lateral sidewalls (25) opposing one another. The electrically insulating elements (21) are disposed at opposing sidewalls (24) of the charge-trapping element (5) and cover the sidewalls (24) of the charge-trapping element (5). The nitride spacers (10) cover the electrically insulating elements (21) and are arranged on opposing sidewalls (25) of the gate stack (20) and on the electrically insulating elements (21).
摘要翻译: 提供了包括半导体衬底(1)和多个存储单元(19)的非易失性半导体存储器(30)和用于制造这种存储器的方法。 每个存储单元(19)包括电荷捕获元件(5),栅极堆叠(20),氮化物间隔物(10)和电绝缘元件(21)。 电荷捕获元件(5)设置在半导体衬底(1)上并且包括夹在底部氧化物层(2)和顶部氧化物层(4)之间的氮化物层(3),电荷俘获元件(5) )具有彼此相对的两个侧壁(24)。 栅极堆叠(20)布置在电荷捕获元件(5)的顶部上,栅极堆叠具有彼此相对的两个侧壁(25)。 电绝缘元件(21)设置在电荷捕获元件(5)的相对侧壁(24)处并覆盖电荷捕获元件(5)的侧壁(24)。 氮化物间隔物(10)覆盖电绝缘元件(21)并且布置在栅极堆叠(20)的相对侧壁(25)上以及电绝缘元件(21)上。
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