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公开(公告)号：US06670972B2
公开(公告)日：2003-12-30
申请号：US09730751
申请日：2000-12-07
IPC分类号： G09G500
CPC分类号： G06F3/04847
摘要： The present invention relates to a user interface control for controlling the value of a variable in a processing system. The user interface control includes, a display, an input device and a processor. The processor is adapted to cooperate with the display and the input device to generate an input representation on the display, the input representation allowing the value of the variable to be specified by the user using the input device. The processor then generates a graphical representation on the display, the graphical representation showing a relationship between the variable and a parameter. Finally, the processor generates an indicator on the display, the indicator indicating a value of the parameter for the value of the variable specified using the input representation.
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2.发明授权Multi-purpose PDU container for delineating PDU datagrams and PDU datagram attributes in an 8B/10B coded system 有权用于在8B / 10B编码系统中描述PDU数据报和PDU数据报属性的多用途PDU容器公开(公告)号：US08289996B2
公开(公告)日：2012-10-16
申请号：US12194589
申请日：2008-08-20
申请人： Mark R. Megarity , Joey Chow , Richard Grieve
发明人： Mark R. Megarity , Joey Chow , Richard Grieve
IPC分类号： H04J3/24
CPC分类号： H04L49/9094 , H04L49/90
摘要： A method of reducing overhead for datagrams that are transmitted to or received from a serial link that reduces overhead to no more than four bytes. The datagram includes at least a Protocol Data Unit (PDU) field, a Start-of-PDU Header (SPH) field, and a SPH Control (SCH) field. The SPH and SCH fields consist of two bytes. The datagram may additionally include End-of-PDU Header (EPH) and EPH Control (ECH) fields. A method may also involve substitution of flags for subsequent headers that are identical to previous headers.
摘要翻译： 一种减少发送到串行链路或从串行链路接收的数据报的开销的方法，将开销降低到不超过四个字节。 该数据报至少包括一个协议数据单元（PDU）字段，一个起始PDU报头（SPH）字段和一个SPH控制（SCH）字段。 SPH和SCH字段由两个字节组成。 该数据报还可以包括端到端头（EPH）和EPH控制（ECH）字段。 一种方法还可能涉及替换与以前的头部相同的后续头部的标志。
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公开(公告)号：US07650546B2
公开(公告)日：2010-01-19
申请号：US11378839
申请日：2006-03-17
申请人： John Madsen , Dion Pike , Richard Grieve
发明人： John Madsen , Dion Pike , Richard Grieve
IPC分类号： G01R31/28
CPC分类号： G01R31/318536
摘要： A circuit comprises two or more chains of components, each chain comprising a plurality of components serially connected by designated pins on each component and at least one chain including one or more components of another chain, the designated pins being designated for data for one or more specific purposes. A selector is included for selecting one chain from the two or more chains over which to data is to be sent. Another circuit comprises a chain of components serially connected by designated pins on each component, and two or more controllers, each controller capable of controlling the chain for one or more of the specific purposes. A wiring board for implementing the circuit is also provided.
摘要翻译： 电路包括两个或更多个部件链，每条链包括多个由每个部件上的指定引脚串联连接的部件和至少一个链条，其中链条包括另一链条的一个或多个部件，指定引脚被指定用于一个或多个 具体目的。 包括一个选择器，用于从要发送数据的两个或更多个链中选择一个链。 另一电路包括通过每个部件上的指定引脚串联连接的部件链，以及两个或多个控制器，每个控制器能够控制链中的一个或多个特定目的。 还提供了用于实现电路的接线板。
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公开(公告)号：US07487344B2
公开(公告)日：2009-02-03
申请号：US11366661
申请日：2006-03-03
IPC分类号： G06F7/60
CPC分类号： G06F9/4401
摘要： A method and apparatus are provided for storing the boot configuration PROM of a microprocessor in an FPGA. The boot interface of the microprocessor, such as an I2C interface, leads to the FPGA instead of to a PROM. The boot configuration is stored as an image in the FPGA, and the microprocessor accesses the boot configuration using its normal boot interface. In this way, a dedicated boot PROM is not needed, saving real estate on the card on which the microprocessor is located. The boot configuration is also more easily modified, such as for version upgrades or diagnostics, than if the boot configuration were stored on a dedicated PROM. Different boot configurations may be stored as software images on a separate housekeeper processor, for loading into the FPGA.
摘要翻译： 提供了一种用于将微处理器的引导配置PROM存储在FPGA中的方法和装置。 微处理器的引导接口（如I2C接口）通向FPGA而不是PROM。 引导配置作为图像存储在FPGA中，微处理器使用其正常引导接口访问引导配置。 以这种方式，不需要专用的引导PROM，从而在微处理器所在的卡上节省不动产。 引导配置也比如果引导配置存储在专用PROM上更容易修改，例如用于版本升级或诊断。 不同的引导配置可以作为软件映像存储在单独的管家处理器上，用于加载到FPGA中。
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公开(公告)号：US20070219032A1
公开(公告)日：2007-09-20
申请号：US11378839
申请日：2006-03-17
申请人： John Madsen , Dion Pike , Richard Grieve
发明人： John Madsen , Dion Pike , Richard Grieve
CPC分类号： G01R31/318536
摘要： A circuit comprises two or more chains of components, each chain comprising a plurality of components serially connected by designated pins on each component and at least one chain including one or more components of another chain, the designated pins being designated for data for one or more specific purposes. A selector is included for selecting one chain from the two or more chains over which to data is to be sent. Another circuit comprises a chain of components serially connected by designated pins on each component, and two or more controllers, each controller capable of controlling the chain for one or more of the specific purposes. A wiring board for implementing the circuit is also provided.
摘要翻译： 电路包括两个或更多个部件链，每条链包括多个由每个部件上的指定引脚串联连接的部件和至少一个链条，其中链条包括另一链条的一个或多个部件，指定引脚被指定用于一个或多个 具体目的。 包括一个选择器，用于从要发送数据的两个或更多个链中选择一个链。 另一电路包括通过每个部件上的指定引脚串联连接的部件链，以及两个或多个控制器，每个控制器能够控制链中的一个或多个特定目的。 还提供了用于实现电路的接线板。
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6.发明申请Method and system for using a queuing device as a lossless stage in a network device in a communications network 有权在通信网络中的网络设备中使用排队设备作为无损阶段的方法和系统公开(公告)号：US20070217336A1
公开(公告)日：2007-09-20
申请号：US11377578
申请日：2006-03-17
申请人： Jason Sterne , Robert Johnson , Aaron MacDonald , Richard Grieve , James Schriel
发明人： Jason Sterne , Robert Johnson , Aaron MacDonald , Richard Grieve , James Schriel
摘要： A method for incorporating a queuing device as a lossless processing stage in a network device in a communications network, comprising: monitoring a depth of a queue in the queuing device, the queue for receiving packets from an upstream device within the network device, the queuing device acting as a discard point by discarding packets when the queue is full; and, if the depth passes a predetermined threshold, sending a message to the upstream device to reduce a rate at which packets are sent to the queuing device to prevent the queue from filling and thereby preventing packet discarding and loss by the queuing device.
摘要翻译： 一种在通信网络中的网络设备中将排队设备作为无损处理级并入的方法，包括：监视队列设备中的队列的深度，用于从网络设备内的上游设备接收分组的队列，排队 设备在队列满时通过丢弃报文作为丢弃点; 并且如果深度通过预定阈值，则向上游设备发送消息以降低分组被发送到排队设备的速率，以防止队列填满，从而防止排队设备丢包和丢失。
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7.发明申请Method and system for incorporating non-redundant components in a redundant system in a communications network 有权在通信网络中的冗余系统中并入非冗余组件的方法和系统公开(公告)号：US20070214401A1
公开(公告)日：2007-09-13
申请号：US11373160
申请日：2006-03-13
申请人： Joey Chow , Mark Megarity , Richard Grieve
发明人： Joey Chow , Mark Megarity , Richard Grieve
IPC分类号： H03M13/00
CPC分类号： H04L49/552
摘要： A method for incorporating a non-redundant component in a redundant system in a communications network, the redundant system having first and second redundant components providing first and second data streams and activity signals, respectively, the activity signals indicating which of the first and second data streams is an active data stream, the first and second data streams being unsynchronized, the method comprising: determining whether an activity switch has occurred from the activity signals; responsive to the determining, selecting an input data stream from among the first and second data streams; filtering the selected input data stream to produce an output data stream by nullifying any incorrect control information inserted into a packet in the input data stream due to the selecting; and, providing the output data stream to the non-redundant component.
摘要翻译： 一种用于在通信网络中的冗余系统中并入非冗余组件的方法，所述冗余系统具有分别提供第一和第二数据流和活动信号的第一和第二冗余组件，所述活动信号指示所述第一和第二数据中的哪一个 流是活动数据流，第一和第二数据流是不同步的，该方法包括：从活动信号确定是否发生了活动切换; 响应于所述确定，从所述第一和第二数据流中选择输入数据流; 过滤所选择的输入数据流以产生输出数据流，通过由于选择而使插入到输入数据流中的分组中的任何不正确的控制信息无效; 并且向非冗余组件提供输出数据流。
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公开(公告)号：US20070208926A1
公开(公告)日：2007-09-06
申请号：US11366661
申请日：2006-03-03
申请人： Richard Grieve , Aaron MacDonald , James Schriel
发明人： Richard Grieve , Aaron MacDonald , James Schriel
IPC分类号： G06F15/177
CPC分类号： G06F9/4401
摘要： A method and apparatus are provided for storing the boot configuration PROM of a microprocessor in an FPGA. The boot interface of the microprocessor, such as an I2C interface, leads to the FPGA instead of to a PROM. The boot configuration is stored as an image in the FPGA, and the microprocessor accesses the boot configuration using its normal boot interface. In this way, a dedicated boot PROM is not needed, saving real estate on the card on which the microprocessor is located. The boot configuration is also more easily modified, such as for version upgrades or diagnostics, than if the boot configuration were stored on a dedicated PROM. Different boot configurations may be stored as software images on a separate housekeeper processor, for loading into the FPGA.
摘要翻译： 提供了一种用于将微处理器的引导配置PROM存储在FPGA中的方法和装置。 微处理器的引导接口（如I2C接口）通向FPGA而不是PROM。 引导配置作为图像存储在FPGA中，微处理器使用其正常引导接口访问引导配置。 以这种方式，不需要专用的引导PROM，从而在微处理器所在的卡上节省不动产。 引导配置也比如果引导配置存储在专用PROM上更容易修改，例如用于版本升级或诊断。 不同的引导配置可以作为软件映像存储在单独的管家处理器上，用于加载到FPGA中。
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公开(公告)号：US08695006B2
公开(公告)日：2014-04-08
申请号：US12114518
申请日：2008-05-02
申请人： Richard Grieve , Paolo Fragapane
发明人： Richard Grieve , Paolo Fragapane
CPC分类号： G06F9/44505
摘要： There is provided a method of managing a resource within a computer system using a configuration wrapper, the method comprising: providing a configuration file comprising configuration data for the resource; generating metadata related to the configuration data; and automatically processing the metadata to produce a configuration wrapper for the resource. The configuration wrapper may be a java object with management attributes and methods.
摘要翻译： 提供了一种使用配置包装器管理计算机系统内的资源的方法，所述方法包括：提供包括所述资源的配置数据的配置文件; 生成与配置数据相关的元数据; 并自动处理元数据以生成资源的配置包装器。 配置包装器可以是具有管理属性和方法的java对象。
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10.发明申请MULTI-PURPOSE PDU CONTAINER FOR DELINEATING PDU DATAGRAMS AND PDU DATAGRAM ATTRIBUTES IN AN 8B/10B CODED SYSTEM 有权用于在8B / 10B编码系统中分配PDU数据库和PDU数据库属性的多目的PDU容器公开(公告)号：US20100046548A1
公开(公告)日：2010-02-25
申请号：US12194589
申请日：2008-08-20
申请人： Mark R. MEGARITY , Joey Chow , Richard Grieve
发明人： Mark R. MEGARITY , Joey Chow , Richard Grieve
IPC分类号： H04J3/24
CPC分类号： H04L49/9094 , H04L49/90
摘要： A method of reducing overhead for datagrams that are transmitted to or received from a serial link that reduces overhead to no more than four bytes. The datagram includes at least a Protocol Data Unit (PDU) field, a Start-of-PDU Header (SPH) field, and a SPH Control (SCH) field. The SPH and SCH fields consist of two bytes. The datagram may additionally include End-of-PDU Header (EPH) and EPH Control (ECH) fields. A method may also involve substitution of flags for subsequent headers that are identical to previous headers.
摘要翻译： 一种减少发送到串行链路或从串行链路接收的数据报的开销的方法，将开销降低到不超过四个字节。 该数据报至少包括一个协议数据单元（PDU）字段，一个起始PDU报头（SPH）字段和一个SPH控制（SCH）字段。 SPH和SCH字段由两个字节组成。 该数据报还可以包括端到端头（EPH）和EPH控制（ECH）字段。 一种方法还可能涉及替换与以前的头部相同的后续头部的标志。
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