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    FinFET body contact structure
    1.
    发明授权
    FinFET body contact structure 有权
    FinFET体接触结构

    公开(公告)号：US07696565B2

    公开(公告)日：2010-04-13

    申请号：US11696331

    申请日：2007-04-04

    申请人： Richard Lee Donze ,  Karl Robert Erickson ,  William Paul Hovis ,  Terrance Wayne Kueper ,  John Edward Sheets, II ,  Jon Robert Tetzloff

    发明人： Richard Lee Donze ,  Karl Robert Erickson ,  William Paul Hovis ,  Terrance Wayne Kueper ,  John Edward Sheets, II ,  Jon Robert Tetzloff

    IPC分类号： H01L29/78

    CPC分类号： H01L29/785 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/42384 ,  H01L29/66795

    摘要： A FinFET body contact structure and a method for creating the FinFET body contact structure are disclosed. The body contact structure comprises a wide fin portion of a semiconductor fin, the wide fin portion having a polysilicon polygon shape formed on a top surface of the wide fin portion. The polysilicon polygon shape has a center area having no polysilicon. FinFETs are formed on two vertical surfaces of the wide fin portion and gates of the FinFETs are coupled to the polysilicon polygon shape. Top surfaces of the wide fin portion and the polysilicon polygon shape are silicided. Silicide bridging is prevented by sidewall spacers. All convex angles on the polysilicon polygon shape are obtuse enough to prevent creation of bridging vertices. The center area is doped of an opposite type from a source and a drain of an associated FinFET.

    摘要翻译： 公开了FinFET体接触结构和用于产生FinFET体接触结构的方法。 本体接触结构包括半导体鳍片的宽鳍片部分，宽鳍片部分形成在宽鳍片部分的顶表面上的多晶硅多边形形状。 多晶硅多晶形状具有不具有多晶硅的中心区域。 FinFET形成在宽鳍片部分的两个垂直表面上，并且FinFET的栅极耦合到多晶硅多边形形状。 宽鳍片部分和多晶硅多边形形状的顶表面被硅化。 通过侧壁间隔物防止硅化物桥接。 多晶硅多边形形状上的所有凸角都足够钝，以防止桥接顶点的产生。 中心区域与相关联的FinFET的源极和漏极相反地掺杂。

    FinFET body contact structure
    2.
    发明授权
    FinFET body contact structure 有权
    FinFET体接触结构

    公开(公告)号：US07241649B2

    公开(公告)日：2007-07-10

    申请号：US10977768

    申请日：2004-10-29

    申请人： Richard Lee Donze ,  Karl Robert Erickson ,  William Paul Hovis ,  Terrance Wayne Kueper ,  John Edward Sheets, II ,  Jon Robert Tetzloff

    发明人： Richard Lee Donze ,  Karl Robert Erickson ,  William Paul Hovis ,  Terrance Wayne Kueper ,  John Edward Sheets, II ,  Jon Robert Tetzloff

    IPC分类号： H01L21/84

    CPC分类号： H01L29/785 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/42384 ,  H01L29/66795

    摘要： A FinFET body contact structure and a method for creating the FinFET body contact structure are disclosed. The body contact structure comprises a wide fin portion of a semiconductor fin, the wide fin portion having a polysilicon polygon shape formed on a top surface of the wide fin portion. The polysilicon polygon shape has a center area having no polysilicon. FinFETs are formed on two vertical surfaces of the wide fin portion and gates of the FinFETs are coupled to the polysilicon polygon shape. Top surfaces of the wide fin portion and the polysilicon polygon shape are silicided. Silicide bridging is prevented by sidewall spacers. All convex angles on the polysilicon polygon shape are obtuse enough to prevent creation of bridging vertices. The center area is doped of an opposite type from a source and a drain of an associated FinFET.

    摘要翻译： 公开了FinFET体接触结构和用于产生FinFET体接触结构的方法。 本体接触结构包括半导体鳍片的宽鳍片部分，宽鳍片部分形成在宽鳍片部分的顶表面上的多晶硅多边形形状。 多晶硅多晶形状具有不具有多晶硅的中心区域。 FinFET形成在宽鳍片部分的两个垂直表面上，并且FinFET的栅极耦合到多晶硅多边形形状。 宽鳍片部分和多晶硅多边形形状的顶表面被硅化。 通过侧壁间隔物防止硅化物桥接。 多晶硅多边形形状上的所有凸角都足够钝，以防止桥接顶点的产生。 中心区域与相关联的FinFET的源极和漏极相反地掺杂。

    Measurement of bias of a silicon area using bridging vertices on polysilicon shapes to create an electrical open/short contact structure
    3.
    发明授权
    Measurement of bias of a silicon area using bridging vertices on polysilicon shapes to create an electrical open/short contact structure 失效
    使用多晶硅形状上的桥接顶点测量硅区域的偏置，以产生电开/短接触结构

    公开(公告)号：US07336086B2

    公开(公告)日：2008-02-26

    申请号：US11559949

    申请日：2006-11-15

    申请人： Richard Lee Donze ,  Karl Robert Erickson ,  William Paul Hovis ,  John Edward Sheets, II ,  Jon Robert Tetzloff

    发明人： Richard Lee Donze ,  Karl Robert Erickson ,  William Paul Hovis ,  John Edward Sheets, II ,  Jon Robert Tetzloff

    IPC分类号： G01R31/26 ,  H01L23/58 ,  H01L21/66

    CPC分类号： H01L22/34 ,  H01L29/785

    摘要： An apparatus and method are disclosed for measuring bias of polysilicon shapes relative to a silicon area wherein the presence of an electrical coupling is used to determine the presence of bias. Bridging vertices on the polysilicon shapes are formed. Bridging vertices over the silicon area create low resistance connections between those bridging vertices and the silicon area; other bridging vertices over ROX (recessed oxide) areas do not create low resistance connections between those other bridging vertices and the silicon area. Determining which bridging vertices have low resistance connections to the silicon area and how many bridging vertices have low resistance connections to the silicon area are used to determine the bias of the polysilicon shapes relative to the silicon area.

    摘要翻译： 公开了一种用于测量多晶硅形状相对于硅区域的偏置的装置和方法，其中使用电耦合的存在来确定偏置的存在。 形成多晶硅形状上的桥接顶点。 在硅区域上的桥接顶点在这些桥接顶点和硅区域之间产生低电阻连接; ROX（凹陷氧化物）区域上的其他桥接顶点不会在其他桥接顶点和硅区域之间产生低电阻连接。 确定哪些桥接顶点具有与硅区域的低电阻连接以及有多少桥接顶点具有与硅区域的低电阻连接，以确定多晶硅形状相对于硅面积的偏置。

    Electrical open/short contact alignment structure for active region vs. gate region
    4.
    发明授权
    Electrical open/short contact alignment structure for active region vs. gate region 失效
    用于有源区域与栅极区域的电开/短接触对准结构

    公开(公告)号：US07183780B2

    公开(公告)日：2007-02-27

    申请号：US10944625

    申请日：2004-09-17

    申请人： Richard Lee Donze ,  Karl Robert Erickson ,  William Paul Hovis ,  John Edward Sheets, II ,  Jon Robert Tetzloff

    发明人： Richard Lee Donze ,  Karl Robert Erickson ,  William Paul Hovis ,  John Edward Sheets, II ,  Jon Robert Tetzloff

    IPC分类号： G01R27/08 ,  G01R31/26 ,  H01L23/58 ,  H01L21/66

    CPC分类号： H01L22/34 ,  H01L29/785

    摘要： An apparatus for measuring alignment of polysilicon shapes to a silicon area. Each polysilicon shape in a first plurality of polysilicon shapes has a bridging vertex positioned near the silicon area. Each polysilicon shape in a second plurality of polysilicon shapes has a bridging vertex positioned near the silicon area. The second plurality of silicon shapes is positioned on the opposite side of the silicon area from the first plurality of silicon shapes. An electrical measurement of how many of the polysilicon shapes in the first plurality of polysilicon shapes and in the second plurality of polysilicon shapes provides a measurement of alignment of the polysilicon shapes and the silicon area.

    摘要翻译： 一种用于测量多晶硅形状与硅区域的取向的装置。 第一多个多晶硅形状中的每个多晶硅形状具有位于硅区附近的桥接顶点。 第二多晶硅形状中的每个多晶硅形状具有位于硅区附近的桥接顶点。 第二多个硅形状位于硅区域与第一多个硅形状的相对侧上。 第一多晶硅形状中的多晶硅形状和第二多晶硅形状中的多晶硅形状的电测量提供了多晶硅形状和硅区域的对准的测量。

    Electrical open/short contact alignment structure for active region vs. gate region
    5.
    发明授权
    Electrical open/short contact alignment structure for active region vs. gate region 失效
    用于有源区域与栅极区域的电开/短接触对准结构

    公开(公告)号：US07659733B2

    公开(公告)日：2010-02-09

    申请号：US11559946

    申请日：2006-11-15

    申请人： Richard Lee Donze ,  Karl Robert Erickson ,  William Paul Hovis ,  John Edward Sheet, II ,  Jon Robert Tetzloff

    发明人： Richard Lee Donze ,  Karl Robert Erickson ,  William Paul Hovis ,  John Edward Sheet, II ,  Jon Robert Tetzloff

    IPC分类号： G01R31/26 ,  H01L23/58 ,  H01L21/66

    CPC分类号： H01L22/34 ,  H01L29/785

    摘要： An apparatus for measuring a structural characteristic between a polysilicon shape and a silicon area. The apparatus for measuring a structural characteristic between a polysilicon shape and a silicon area comprises the silicon area, and a plurality of polysilicon shapes each having a unique orientation relative to the silicon area wherein each of the polysilicon shapes is formed having an angle less than or equal to a critical angle. The critical angle is an angle at or below which a sidewall spacer no longer is formed on a polysilicon shape, thereby causing the polysilicon shape to short circuit to an underlying portion of the silicon area by way of a silicide bridge.

    摘要翻译： 一种用于测量多晶硅形状和硅区域之间的结构特性的装置。 用于测量多晶硅形状和硅区域之间的结构特性的装置包括硅区域，以及多个多晶硅形状，其各自具有相对于硅区域的独特取向，其中形成的每个多晶硅形状的角度小于或等于 等于临界角。 临界角是在多晶硅形状上不再形成侧壁间隔物的角度或低于该角度，从而导致多晶硅形状通过硅化物桥短路到硅区域的下面部分。

    Electrical open/short contact alignment structure for active region vs. gate region
    6.
    发明授权
    Electrical open/short contact alignment structure for active region vs. gate region 失效
    用于有源区域与栅极区域的电开/短接触对准结构

    公开(公告)号：US07453272B2

    公开(公告)日：2008-11-18

    申请号：US11559940

    申请日：2006-11-15

    申请人： Richard Lee Donze ,  Karl Robert Erickson ,  William Paul Hovis ,  John Edward Sheets ,  Jon Robert Tetzloff

    发明人： Richard Lee Donze ,  Karl Robert Erickson ,  William Paul Hovis ,  John Edward Sheets ,  Jon Robert Tetzloff

    IPC分类号： G01R31/26 ,  H01L23/58 ,  H01L21/66

    CPC分类号： H01L22/34 ,  H01L29/785

    摘要： A method is disclosed for measuring alignment of polysilicon shapes relative to a silicon area wherein the presence of an electrical coupling is used to determine the presence of bias or misalignment. Bridging vertices on the polysilicon shapes are formed. Bridging vertices over the silicon area create low resistance connections between those bridging vertices and the silicon area; other bridging vertices over ROX (recessed oxide) areas do not create low resistance connections between those other bridging vertices and the silicon area. Determining which bridging vertices have low resistance connections to the silicon area and how many bridging vertices have low resistance connections to the silicon area are used to determine the bias and misalignment of the polysilicon shapes relative to the silicon area.

    摘要翻译： 公开了一种用于测量多晶硅形状相对于硅区域的对准的方法，其中使用电耦合的存在来确定偏置或未对准的存在。 形成多晶硅形状上的桥接顶点。 在硅区域上的桥接顶点在这些桥接顶点和硅区域之间产生低电阻连接; ROX（凹陷氧化物）区域上的其他桥接顶点不会在其他桥接顶点和硅区域之间产生低电阻连接。 确定哪些桥接顶点具有与硅区域的低电阻连接以及有多少桥接顶点具有与硅区域的低电阻连接，以确定多晶硅形状相对于硅面积的偏置和未对准。