公开(公告)号：US06911896B2

公开(公告)日：2005-06-28

申请号：US10403945

申请日：2003-03-31

申请人： Richard Nicholson ,  Simon Churchill ,  Srikanth Govindarajulu

发明人： Richard Nicholson ,  Simon Churchill ,  Srikanth Govindarajulu

IPC分类号： H03M1/06 ,  H03M1/36 ,  H03M1/76 ,  H01C1/012

CPC分类号： H03M1/0678 ,  H03M1/36 ,  H03M1/76

摘要： A resistor string that may have two resistor matrices laid out back-to-back with selected or all nominally equipotential nodes of the two matrices being interconnected. In certain applications, the matrix may have switch connections at each node, with the second matrix being an inactive matrix that may have the same number or different number, typically fewer resistors than the first matrix. In another embodiment, separate matrices may be used, and the inactive matrix may be smaller and have fewer resistors of a lower value to minimize the effect of gradients across the substrate. Preferred matrices and node connection switch configurations, as well as various embodiments of these and other features of the invention are disclosed.

摘要翻译： 可以具有两个电阻矩阵的电阻串，这两个电阻矩阵相互布置，两个矩阵的选定或所有名义上的等电位节点相互连接。 在某些应用中，矩阵可以在每个节点处具有开关连接，其中第二矩阵是可以具有相同数量或不同数量的无源矩阵，通常比第一矩阵更少的电阻器。 在另一个实施例中，可以使用单独的矩阵，并且非活性矩阵可以更小并且具有较低值的较少电阻器以最小化跨越衬底的梯度的影响。 公开了优选的矩阵和节点连接开关配置，以及本发明的这些和其他特征的各种实施例。

公开(公告)号：US07940091B1

公开(公告)日：2011-05-10

申请号：US12396151

申请日：2009-03-02

申请人： Srikanth Govindarajulu ,  Andrew Joseph Gardner ,  Robert C. Chiacchia

发明人： Srikanth Govindarajulu ,  Andrew Joseph Gardner ,  Robert C. Chiacchia

IPC分类号： H03K5/00

CPC分类号： H03K19/01735 ,  G11C27/02 ,  H03K17/063

摘要： Methods and apparatus for sampling an input voltage and apparatus incorporating the same are disclosed. An input voltage sampling apparatus includes a voltage sampling circuit coupled to the input voltage and configured to produce a sampled input voltage at an output terminal, and a voltage charging circuit coupled to the voltage sampling device and producing a first charged voltage on a first charged voltage output terminal and a second charged voltage on a second charged voltage output terminal. A voltage charging enabling circuit is coupled to the voltage charging circuit, the voltage sampling device via the first connection, and a power supply voltage. Further, the input voltage sampling apparatus includes a control circuit coupled to the voltage sampling circuit, the voltage charging circuit, and the power supply voltage, ground, third and fourth pulse signals. The first and third pulse signals are non-overlapping with the second and fourth pulse signals. The first pulse signal is delayed on the rising edge of the third pulse signal and the second pulse signal is delayed on the rising edge of the fourth pulse signal. The voltage sampling apparatus is capable of sampling an input voltage that is higher than the power supply voltage.

摘要翻译： 公开了用于对输入电压进行采样的方法和装置及其结合的装置。 输入电压采样装置包括耦合到输入电压并被配置为在输出端产生采样输入电压的电压采样电路，以及耦合到电压采样装置并在第一充电电压上产生第一充电电压的电压充电电路 输出端子和第二充电电压输出端子上的第二充电电压。 电压充电使能电路经由第一连接与电压充电电路，电压取样装置和电源电压耦合。 此外，输入电压采样装置包括耦合到电压采样电路，电压充电电路和电源电压，接地，第三和第四脉冲信号的控制电路。 第一和第三脉冲信号与第二和第四脉冲信号不重叠。 第一脉冲信号在第三脉冲信号的上升沿延迟，第二脉冲信号在第四脉冲信号的上升沿被延迟。 电压采样装置能够对高于电源电压的输入电压进行采样。