公开(公告)号：US06507272B1

公开(公告)日：2003-01-14

申请号：US09915464

申请日：2001-07-26

申请人： Richard Nicholson ,  Simon Churchill ,  Hao Tang

发明人： Richard Nicholson ,  Simon Churchill ,  Hao Tang

IPC分类号： H01L101

CPC分类号： H03M1/0648 ,  H01L27/0802 ,  H03M1/685 ,  H03M1/765

摘要： Enhanced linearity, low switching perturbation resistor string matrices. The resistor strings are arranged in an array of a plurality of rows of resistive elements and electrically arranged with rows equally spaced above and below the physical centerline of the array being coupled together in an opposite sense. Preferably also physically adjacent rows are equally spaced from the center of the electrical order of rows. This connection prevents accumulation of errors due to vertical and horizontal resistance gradients over the array. Also node selection by controlling node select transistors coupled to column select lines to select one node in each row, and also controlling row select transistors to select the row of the desired node minimizes settling time after a tap change by inducing equal and opposite voltage changes at points close together along the resistor string, whether in the array of the present invention or in the snake configuration.

摘要翻译： 增强的线性度，低开关扰动电阻串矩阵。 电阻器串被布置成多行电阻元件的阵列，并且电排列成与阵列的物理中心线的上方和下方相等的间隔以相反的意义耦合在一起。 优选地，物理上相邻的行与电排列的中心等距地间隔开。 这种连接可防止阵列上的垂直和水平电阻梯度引起的误差累积。 还通过控制节点选择晶体管来选择耦合到列选择线以选择每行中的一个节点，并且还控制行选择晶体管以选择所需节点的行，通过在抽头变换之后引起相等且相反的电压变化来最小化最小化稳定时间 无论是在本发明的阵列中还是在蛇形结构中，沿着电阻串一起靠近的点。

公开(公告)号：US06911896B2

公开(公告)日：2005-06-28

申请号：US10403945

申请日：2003-03-31

申请人： Richard Nicholson ,  Simon Churchill ,  Srikanth Govindarajulu

发明人： Richard Nicholson ,  Simon Churchill ,  Srikanth Govindarajulu

IPC分类号： H03M1/06 ,  H03M1/36 ,  H03M1/76 ,  H01C1/012

CPC分类号： H03M1/0678 ,  H03M1/36 ,  H03M1/76

摘要： A resistor string that may have two resistor matrices laid out back-to-back with selected or all nominally equipotential nodes of the two matrices being interconnected. In certain applications, the matrix may have switch connections at each node, with the second matrix being an inactive matrix that may have the same number or different number, typically fewer resistors than the first matrix. In another embodiment, separate matrices may be used, and the inactive matrix may be smaller and have fewer resistors of a lower value to minimize the effect of gradients across the substrate. Preferred matrices and node connection switch configurations, as well as various embodiments of these and other features of the invention are disclosed.

摘要翻译： 可以具有两个电阻矩阵的电阻串，这两个电阻矩阵相互布置，两个矩阵的选定或所有名义上的等电位节点相互连接。 在某些应用中，矩阵可以在每个节点处具有开关连接，其中第二矩阵是可以具有相同数量或不同数量的无源矩阵，通常比第一矩阵更少的电阻器。 在另一个实施例中，可以使用单独的矩阵，并且非活性矩阵可以更小并且具有较低值的较少电阻器以最小化跨越衬底的梯度的影响。 公开了优选的矩阵和节点连接开关配置，以及本发明的这些和其他特征的各种实施例。

公开(公告)号：US06859091B1

公开(公告)日：2005-02-22

申请号：US10666397

申请日：2003-09-18

申请人： Richard Nicholson ,  Simon Churchill

发明人： Richard Nicholson ,  Simon Churchill

IPC分类号： H02M3/07 ,  G05F1/10

CPC分类号： H02M3/07 ,  H02M2001/0045

摘要： Continuous linear regulated zero dropout charge pump with high efficiency load predictive clocking scheme AND method. The method of pumping charge includes amplifying the difference between a feedback signal from the charge pump output and a reference, and alternately switching between: a) coupling a first flying capacitor between first and second power supply terminals, and coupling a second flying capacitor between the amplified difference and the charge pump output; and b), coupling the second flying capacitor between first and second power supply terminals, and coupling the first flying capacitor between the amplified difference and the charge pump output. Preferably the switching is done before the amplifier saturates. Various alternate embodiments and method and apparatus for starting the charge pump are described.

摘要翻译： 具有高效率负载预测计时方案的连续线性稳压零压差电荷泵AND方法。 泵送电荷的方法包括放大来自电荷泵输出的反馈信号与参考之间的差异，并交替地切换：a）在第一和第二电源端子之间耦合第一飞跨电容器，以及在第 放大差值和电荷泵输出; 以及b），将所述第二飞跨电容器耦合在第一和第二电源端子之间，并且将所述第一飞越电容器耦合在所述放大的差值和所述电荷泵输出之间。 优选地，在放大器饱和之前进行切换。 描述用于启动电荷泵的各种替代实施例和方法和装置。

公开(公告)号：US06486818B1

公开(公告)日：2002-11-26

申请号：US09916067

申请日：2001-07-26

申请人： Richard Nicholson ,  Simon Churchill

发明人： Richard Nicholson ,  Simon Churchill

IPC分类号： H03M166

CPC分类号： H03M1/682 ,  H03M1/687 ,  H03M1/745 ,  H03M1/747 ,  H03M1/765

摘要： Segmented resistor string digital-to-analog converters using a resistor string primary converter segment and a current source secondary. The primary converter segment provides conversion of the most significant bits to an analog voltage form and the current source provides conversion of the least significant bits to an analog current form. An output circuit combines the two into a single analog output. Various embodiments are disclosed.

摘要翻译： 分段电阻串数模转换器使用电阻串初级转换器段和电流源二级。 主转换器段提供最高有效位到模拟电压形式的转换，并且电流源提供最低有效位到模拟电流形式的转换。 输出电路将两者组合成单个模拟输出。 公开了各种实施例。

公开(公告)号：US06803799B1

公开(公告)日：2004-10-12

申请号：US10452683

申请日：2003-05-30

申请人： Simon Churchill ,  Richard Nicholson

发明人： Simon Churchill ,  Richard Nicholson

IPC分类号： H03K3289

CPC分类号： H03K3/356156 ,  H03K3/012 ,  H03K3/35625

摘要： A low power, high speed D type flip flop is disclosed. The D type flip flop uses four inverters and four transmission gates to store and output the data states. The flip flop comprises two memory elements wherein each memory element is made up of a transmission gate and two inverters. Each of the four inverters contained in the flip flop is referred to as a bypass current limiting inverter. Each of the four inverters contains biasing circuitry to limit current flow and thereby save power. Additionally, each inverter has switching circuitry that enables the current limiting features to be automatically and advantageously bypassed thereby allowing for large currents and fast response times whilst simultaneously retaining the low power performance.

摘要翻译： 公开了一种低功率，高速D型触发器。 D型触发器使用四个反相器和四个传输门来存储和输出数据状态。 触发器包括两个存储器元件，其中每个存储器元件由传输门和两个反相器构成。 包含在触发器中的四个反相器中的每一个被称为旁路限流逆变器。 四个逆变器中的每一个都包含偏置电路，以限制电流流动，从而节省功率。 此外，每个逆变器具有切换电路，其能够自动且有利地绕过限流特征，从而允许大电流和快速响应时间，同时保持低功率性能。