公开(公告)号：US08037285B1

公开(公告)日：2011-10-11

申请号：US11880882

申请日：2007-07-23

申请人： Richard Win Thaik ,  John Gregory Favor ,  Joseph Byron Rowlands ,  Leonard Eric Shar ,  Matthew William Ashcraft ,  Ivan Pavle Radivojevic

发明人： Richard Win Thaik ,  John Gregory Favor ,  Joseph Byron Rowlands ,  Leonard Eric Shar ,  Matthew William Ashcraft ,  Ivan Pavle Radivojevic

IPC分类号： G06F15/00

CPC分类号： G06F12/0875 ,  G06F9/3017 ,  G06F9/30189 ,  G06F9/3802 ,  G06F9/3808 ,  G06F9/3812 ,  G06F9/3836 ,  G06F12/1027 ,  G06F12/1054 ,  Y02D10/13

摘要： An instruction processing circuit includes a decoder circuit operable to receive a sequence of instructions and to decode the received sequence of instructions into a first type of sequence of operations, and a trace builder circuit operable to receive at least a portion of the sequence of operations of the first type and to generate, based thereon, a second type of sequence of operations, where the at least a portion of the sequence of operations of the first type represents a first portion of the sequence of instructions, where the first portion of the sequence of instructions includes at most one conditional control transfer instruction that, when present, ends the first portion of the sequence of instructions, and where the sequence of operations of the second type also represents the first portion of the sequence of instructions.

摘要翻译： 指令处理电路包括解码器电路，其可操作以接收指令序列并且将接收的指令序列解码为第一类型的操作序列，以及跟踪构建器电路，其可操作以接收至少一部分操作序列 第一类型并基于此产生第二类型的操作序列，其中第一类型的操作序列的至少一部分表示指令序列的第一部分，其中序列的第一部分 指令包括最多一个条件控制传输指令，当存在时，结束指令序列的第一部分，并且第二类型的操作序列也表示指令序列的第一部分。

公开(公告)号：US07937564B1

公开(公告)日：2011-05-03

申请号：US11941908

申请日：2007-11-16

申请人： Matthew William Ashcraft ,  John Gregory Favor ,  Christopher Patrick Nelson ,  Ivan Pavle Radivojevic ,  Joseph Byron Rowlands ,  Richard Win Thaik

发明人： Matthew William Ashcraft ,  John Gregory Favor ,  Christopher Patrick Nelson ,  Ivan Pavle Radivojevic ,  Joseph Byron Rowlands ,  Richard Win Thaik

IPC分类号： G06F9/30

CPC分类号： G06F9/3017 ,  G06F9/3808 ,  G06F9/3838 ,  G06F9/3853 ,  G06F11/30

摘要： A method and apparatus for optimizing a sequence of operations adapted for execution by a processor is disclosed to include associating a symbolic expression with each of at least a subset of the registers, holding a set of dependency indications that specify for each particular symbolic expression which, if any, of the other symbolic expressions must be emitted as operations prior to emitting the particular symbolic expression, locating an operation, if any, that is next within the sequence of operations and setting that operation to be a working operation and processing the working operation. Processing is performed by handling the working operation by a combination of updating zero or more of the symbolic expressions and emitting zero or more of the symbolic expressions as operations, identifying which, if any, of the symbolic expressions that were updated in process were updated such that they must be emitted prior to which other, if any, of the symbolic expressions, and then updating the dependency indicators to include any such dependencies, and identifying which, if any, of the symbolic expressions that were updated in process were updated such that they no longer need to be emitted prior to which other, if any, of the symbolic expressions, and then updating the dependency indicators to remove any such dependencies.

摘要翻译： 公开了一种用于优化适于由处理器执行的操作序列的方法和装置，以包括将符号表达式与寄存器的至少一个子集中的每一个相关联，保存针对每个特定符号表达式指定的一组依赖性指示， 如果有的话，其他符号表达式必须在发出特定符号表达式之前作为操作发出，定位操作序列中的操作（如果有的话），并将该操作设置为工作操作并处理工作操作 。 处理是通过将更新零个或多个符号表达式并发出零个或多个符号表达式作为操作的组合来处理工作操作来执行的，识别在更新过程中更新的符号表达式中的哪一个更新为 它们必须在其他符号表达式之前被发射，然后更新依赖性指示符以包括任何这样的依赖性，并且识别在过程中更新的符号表达式中的哪一个（如果有的话）被更新，使得 它们不再需要在其他（如果有的话）符号表达式之前发出，然后更新依赖性指示符以删除任何这样的依赖关系。

公开(公告)号：US08499293B1

公开(公告)日：2013-07-30

申请号：US11941912

申请日：2007-11-16

申请人： Matthew William Ashcraft ,  John Gregory Favor ,  Christopher Patrick Nelson ,  Ivan Pavle Radivojevic ,  Joseph Byron Rowlands ,  Richard Win Thaik

发明人： Matthew William Ashcraft ,  John Gregory Favor ,  Christopher Patrick Nelson ,  Ivan Pavle Radivojevic ,  Joseph Byron Rowlands ,  Richard Win Thaik

IPC分类号： G06F9/45

CPC分类号： G06F8/441

摘要： A method and apparatus for optimizing a sequence of operations adapted for execution by a processor is disclosed to include associating with each register a symbolic expression selected from a set of possible symbolic expressions, locating an operation, if any, that is next within the sequence of operations and setting that operation to be a working operation, where the working operation has associated therewith a destination register and zero or more source registers, and processing the working operation when the working operation and any symbolic expressions of its source registers, if any, match at least one of a set of rules, where each rule specifies that the working operation must match a subset of the operation set, where each rule also specifies that the symbolic expressions, if any, of any source registers of the working operation must match a subset of the possible symbolic expressions, and where the rule also specifies a result, then posting the result as the symbolic expression of the destination register.

摘要翻译： 公开了一种用于优化适于由处理器执行的操作序列的方法和装置，以包括将每个寄存器与从一组可能的符号表达式中选择的符号表达式相关联，定位下一个在 操作并将操作设置为工作操作，其中工作操作与目标寄存器和零个或多个源寄存器相关联，并且当工作操作和其源寄存器的任何符号表达（如果有的话）匹配时，处理工作操作 一组规则中的至少一个，其中每个规则规定工作操作必须与操作集的子集匹配，其中每个规则还规定工作操作的任何源寄存器的符号表达式（如果有的话）必须匹配 可能的符号表达式的子集，以及规则还指定结果的位置，然后将结果作为符号表达过程发布 目的地寄存器。

公开(公告)号：US07849292B1

公开(公告)日：2010-12-07

申请号：US11941900

申请日：2007-11-16

申请人： Matthew William Ashcraft ,  John Gregory Favor ,  Christopher Patrick Nelson ,  Ivan Pavle Radivojevic ,  Joseph Byron Rowlands ,  Richard Win Thaik

发明人： Matthew William Ashcraft ,  John Gregory Favor ,  Christopher Patrick Nelson ,  Ivan Pavle Radivojevic ,  Joseph Byron Rowlands ,  Richard Win Thaik

IPC分类号： G06F9/00

CPC分类号： G06F9/3853 ,  G06F8/45 ,  G06F9/3017 ,  G06F9/3808 ,  G06F9/3836

摘要： A method and apparatus for optimizing a sequence of operations adapted for execution by a processor is disclosed to include locating an operation, if any, that is next within the sequence of operations and setting a current operation to be that operation. The current operation is processed as follows: a) de-activating, if not already de-activated, a consumed indicator associated with the current operation; and b) when the current operation is of the producer type, then activating, if not already activated, a producer indicator associated with the current operation, and locating a first set of operations, if any, that i) are earlier in the sequence of operations than the current operation, ii) have their associated producer indicator activated, and iii) have their associated consumed indicator de-activated, and then de-activating the producer indicator associated with each operation in the first set. When the current operation is of the consumer type, then locating a second set of operations, if any, that are earlier in the sequence of operations than the current operation, and then activating, if not already activated, the consumed indicator associated with each operation in the second set.

摘要翻译： 公开了一种用于优化适于由处理器执行的操作序列的方法和装置，以包括定位接下来在操作序列内的操作（​​如果有的话），并将当前操作设置为该操作。 当前操作如下处理：a）取消激活与当前操作相关联的消耗的指示符（如果尚未被去激活） 以及b）当当前操作是生产者类型时，然后激活（如果尚未激活）与当前操作相关联的生产者指示符，并且定位第一组操作（如果有的话）i） 操作，ii）使其相关联的生成器指示符被激活，以及iii）使其相关联的消费指示符被激活，然后去激活与第一组中的每个操作相关联的生成器指示符。 当当前操作是消费者类型时，然后找到比当前操作更早的操作序列中的第二组操作（如果有的话），然后激活（如果尚未激活）与每个操作相关联的消耗的指示符 在第二集。

公开(公告)号：US07783863B1

公开(公告)日：2010-08-24

申请号：US11923638

申请日：2007-10-24

申请人： Christopher Patrick Nelson ,  John Gregory Favor ,  Richard Win Thaik ,  Matthew William Ashcraft

发明人： Christopher Patrick Nelson ,  John Gregory Favor ,  Richard Win Thaik ,  Matthew William Ashcraft

IPC分类号： G06F9/00

CPC分类号： G06F9/3861 ,  G06F9/3808 ,  G06F9/3836 ,  G06F11/1405

摘要： A method of handling a trace to be aborted includes receiving an indication of a trace to be aborted and an indication of an abort reason corresponding to an execution of the trace to be aborted. The trace to be aborted has a trace type associated therewith and includes a sequence of the operations, and represents a sequence of at least two of the instructions. The method further includes identifying a corrective action based at least in part on the type of the trace to be aborted and on the abort reason, not taking into account a correspondence between the at least one operation that caused the execution to be aborted and the at least one instruction that the at least one operation at least in part represents. A next trace and its trace type is determined for execution, where the determining is based on the trace to be aborted and on the corrective action.

摘要翻译： 处理要被中止的迹线的方法包括接收要中止的迹线的指示以及与要中止的迹线的执行相对应的中止原因的指示。 要中止的轨迹具有与之相关联的跟踪类型，并且包括操作的序列，并且表示指令中的至少两个的序列。 所述方法还包括至少部分地基于要中止的跟踪的类型以及中止原因来识别纠正措施，而不考虑导致执行中止的至少一个操作与在待机中的对应关系 所述至少一个操作至少部分地表示的至少一个指令。 下一个跟踪及其跟踪类型被确定为执行，其中确定基于要中止的跟踪以及纠正措施。

公开(公告)号：US07941607B1

公开(公告)日：2011-05-10

申请号：US11782140

申请日：2007-07-24

申请人： Richard Thaik ,  John Gregory Favor ,  Joseph Rowlands ,  Leonard E. Shar ,  Matthew William Ashcraft

发明人： Richard Thaik ,  John Gregory Favor ,  Joseph Rowlands ,  Leonard E. Shar ,  Matthew William Ashcraft

IPC分类号： G06F13/00

CPC分类号： G06F12/0875 ,  G06F9/30174 ,  G06F9/3802 ,  G06F9/3808 ,  G06F9/3812 ,  G06F9/3836 ,  G06F12/1027 ,  G06F12/1054 ,  Y02D10/13

摘要： A method and system for promoting traces in an instruction processing circuit is disclosed. The method and system comprises determining if a current trace is promotable; and adding the current trace to a sequence buffer if the current trace is promotable. The current trace is marked as promoted and the current trace is marked as a first trace of a multi-block trace. The method and system includes determining if a next trace is promotable; adding the next trace to the sequence buffer if the next trace is promotable; and repeating the above until the next trace is not promotable and then adding the next trace to the sequence buffer if the next trace is not promotable.

摘要翻译： 公开了一种用于在指令处理电路中促进迹线的方法和系统。 所述方法和系统包括确定当前迹线是否可促进; 并且如果当前跟踪是可升级的，则将当前跟踪添加到序列缓冲器。 当前跟踪被标记为提升，当前跟踪被标记为多块跟踪的第一个跟踪。 所述方法和系统包括确定下一个跟踪是否可提升; 将下一个跟踪添加到序列缓冲区，如果下一个跟踪是可升级的; 并重复上述操作，直到下一个跟踪不可升级，然后如果下一个跟踪不可升级，则将下一个跟踪添加到序列缓冲区。