Method and system for the design of pipelines of processors
    2.
    发明授权
    Method and system for the design of pipelines of processors 失效
    处理器管道设计方法与系统

    公开(公告)号:US07107199B2

    公开(公告)日:2006-09-12

    申请号:US10284932

    申请日:2002-10-31

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5045

    摘要: A method of designing a pipeline comprises the steps of: accepting a task procedure expressed in a standard programming language, the task procedure including a sequence of computational steps; accepting a performance requirement of the pipeline; and automatically creating a hardware description of the pipeline, the pipeline comprising a plurality of interconnected processor stages, each of the processor stages for performing a respective one of the computational steps, the pipeline having characteristics consistent with the performance requirement of the pipeline.

    摘要翻译: 一种设计流水线的方法包括以下步骤:接受以标准编程语言表达的任务过程,所述任务过程包括一系列计算步骤; 接受管道的性能要求; 以及自动创建所述流水线的硬件描述,所述流水线包括多个互连的处理器级,每个处理器级用于执行相应的一个计算步骤,所述流水线具有与流水线的性能要求一致的特性。

    Programmatic design space exploration through validity filtering and quality filtering
    3.
    发明授权
    Programmatic design space exploration through validity filtering and quality filtering 失效
    通过有效性过滤和质量过滤进行程序设计空间探索

    公开(公告)号:US06963823B1

    公开(公告)日:2005-11-08

    申请号:US09502194

    申请日:2000-02-10

    IPC分类号: G06F7/60 G06F17/10 G06F17/50

    CPC分类号: G06F17/505

    摘要: Design spaces for systems, including hierarchical systems, are programmatically validity filtered and quality filtered to produce validity sets and quality sets, reducing the number of designs to be evaluated in selecting a system design for a particular application. Validity filters and quality filters are applied to both system designs and component designs. Component validity sets are combined as Cartesian products to form system validity sets that can be further validity filtered. Validity filters are defined by validity predicates that are functions of discrete system parameters and that evaluate as TRUE for potentially valid systems. For some hierarchical systems, the system validity predicate is a product of component validity predicates. Quality filters use an evaluation metric produced by an evaluation function that permits comparing designs and preparing a quality set of selected designs. In some cases, the quality set is a Pareto set or an approximation thereof.

    摘要翻译: 用于系统的设计空间(包括分层系统)以编程方式进行有效性过滤和质量过滤以产生有效性集合和质量集合,从而减少为特定应用程序选择系统设计时要评估的设计数量。 有效的过滤器和质量过滤器都适用于系统设计和组件设计。 组合有效性集合被组合为笛卡尔乘积以形成可以进一步有效性过滤的系统有效性集合。 有效性过滤器由作为离散系统参数的函数的有效性谓词定义,并且对于潜在的有效系统评估为TRUE。 对于一些分层系统,系统有效性谓词是组件有效性谓词的乘积。 质量过滤器使用由评估功能产生的评估指标,允许比较设计并准备一组选定的设计。 在某些情况下,质量集是帕累托集或其近似值。

    Intentionally skewed optical clock signal distribution
    4.
    发明授权
    Intentionally skewed optical clock signal distribution 有权
    有意偏斜的光时钟信号分布

    公开(公告)号:US08543005B2

    公开(公告)日:2013-09-24

    申请号:US12990494

    申请日:2008-04-30

    IPC分类号: H04B10/00

    CPC分类号: H04B10/1121 G06F1/105

    摘要: Embodiments of the present invention relate to systems and methods for distributing an intentionally skewed optical-clock signal to nodes of a source synchronous computer system. In one system embodiment, a source synchronous system comprises a waveguide, an optical-system clock optically coupled to the waveguide, and a number of nodes optically coupled to the waveguide. The optical-system clock generates and injects a master optical-clock signal into the waveguide. The master optical-clock signal acquiring a skew as it passes between nodes. Each node extracts a portion of the master optical-clock signal and processes optical signals using the portion of the master optical-clock signal having a different skew for the respective extracting node.

    摘要翻译: 本发明的实施例涉及将故意偏斜的光时钟信号分配给源同步计算机系统的节点的系统和方法。 在一个系统实施例中,源同步系统包括波导,光学耦合到波导的光学系统时钟以及光耦合到波导的多个节点。 光学系统时钟产生并将主光时钟信号注入到波导中。 主光时钟信号在节点之间通过时获取偏斜。 每个节点提取主光时钟信号的一部分,并使用对于相应提取节点具有不同偏斜的主光学时钟信号的部分来处理光信号。

    Computer-implemented method for obtaining a minimum biclique cover in a bipartite dataset
    5.
    发明授权
    Computer-implemented method for obtaining a minimum biclique cover in a bipartite dataset 有权
    用于在二分数据集中获得最小双面覆盖的计算机实现方法

    公开(公告)号:US08209742B2

    公开(公告)日:2012-06-26

    申请号:US12350130

    申请日:2009-01-07

    IPC分类号: H04L29/06

    CPC分类号: G06F17/10

    摘要: A method includes providing a bipartite graph having vertices of a first type, vertices of a second type, and a plurality of edges, wherein each edge joins a vertex of the first type with a vertex of the second type. A unipartite edge dual graph is generated from the bipartite graph, and a minimum clique partition of the edge dual graph is recursively determined. A biclique is then created in the bipartite graph corresponding to each clique in the minimum clique partition of the edge dual graph.

    摘要翻译: 一种方法包括提供具有第一类型的顶点,第二类型的顶点和多个边缘的二分图,其中每个边缘将第一类型的顶点与第二类型的顶点相连接。 从二分图生成一个单边缘双图,并递归地确定边缘双图的最小分区。 然后在对应于边缘双图的最小集团分区中的每个团体的二分图中创建双面。

    Function unit allocation in processor design
    6.
    发明授权
    Function unit allocation in processor design 失效
    处理器设计中的功能单元分配

    公开(公告)号:US06460173B1

    公开(公告)日:2002-10-01

    申请号:US09378431

    申请日:1999-08-20

    IPC分类号: G06F1750

    CPC分类号: G06F17/5045

    摘要: Methods and apparatus are described for selecting operation devices or hardware components for a processor, such as an embedded processor having pipelined data paths. The process may include identifying a set of hardware components, such as function units, and a plurality of characteristics for those hardware components. A first set of characteristics may include the ability to add, subtract, multiply, and the like, or they may be multi-functional. A second set of characteristics for the hardware components may include cost, throughput and the like. A plurality of these characteristics of the hardware components are incorporated into an algorithm, which is then solved for one or more desired parameters, such as type and number of hardware components. In one preferred embodiment, the least cost assembly of hardware components is found for carrying out a set of computations defined by an algorithm to be executed on the processor according to a preferred initiation interval.

    摘要翻译: 描述了用于选择用于处理器(例如具有流水线数据路径的嵌入式处理器)的操作设备或硬件组件的方法和装置。 该过程可以包括识别一组硬件组件,诸如功能单元,以及用于那些硬件组件的多个特性。 第一组特征可以包括添加,减法,乘法等的能力,或者它们可以是多功能的。 硬件组件的第二组特征可以包括成本,吞吐量等。 硬件组件的这些特征的多个被并入到一个算法中,然后解决一个或多个期望的参数,例如硬件组件的类型和数量。 在一个优选实施例中,发现硬件组件的最低成本组合用于执行由根据优选启动间隔在处理器上执行的算法定义的一组计算。

    Dynamic Utilization of Power-Down Modes in Multi-Core Memory Modules
    7.
    发明申请
    Dynamic Utilization of Power-Down Modes in Multi-Core Memory Modules 有权
    多内核模块中掉电模式的动态利用

    公开(公告)号:US20110138387A1

    公开(公告)日:2011-06-09

    申请号:US13058067

    申请日:2008-08-13

    IPC分类号: G06F9/00 G06F9/455

    摘要: Various embodiments of the present invention are directed to methods that enable a memory controller to choose a particular operation mode for virtual memory devices of a memory module based on dynamic program behavior. In one embodiment, a method for determining an operation mode for each virtual memory device of a memory module includes selecting a metric (1001) that provides a standard by which performance and/or energy efficiency of the memory module is optimized during execution of one or more applications on a multicore processor. For each virtual memory device (1005), the method also includes collecting usage information (1006) associated with the virtual memory device over a period of time, determining an operation mode (1007) for the virtual memory device based on the metric and usage information, and entering the virtual memory device into the operation mode (1103, 1105, 1107, 1108).

    摘要翻译: 本发明的各种实施例涉及使存储器控制器能够基于动态程序行为为存储器模块的虚拟存储器件选择特定操作模式的方法。 在一个实施例中,一种用于确定存储器模块的每个虚拟存储器设备的操作模式的方法包括:选择度量(1001),其提供在执行一个或多个存储器模块期间优化存储器模块的性能和/或能量效率的标准 多核处理器上的更多应用程序。 对于每个虚拟存储设备(1005),该方法还包括在一段时间内收集与虚拟存储设备相关联的使用信息(1006),基于度量和使用信息确定虚拟存储设备的操作模式(1007) ,并且进入虚拟存储设备进入操作模式(1103,1105,1107,1108)。

    Intentionally Skewed Optical Clock Signal Distribution
    8.
    发明申请
    Intentionally Skewed Optical Clock Signal Distribution 有权
    故意倾斜的光时钟信号分配

    公开(公告)号:US20110052204A1

    公开(公告)日:2011-03-03

    申请号:US12990494

    申请日:2008-04-30

    IPC分类号: H04B10/12

    CPC分类号: H04B10/1121 G06F1/105

    摘要: Embodiments of the present invention relate to systems and methods for distributing an intentionally skewed optical-clock signal to nodes of a source synchronous computer system. In one system embodiment, a source synchronous system comprises a waveguide, an optical-system clock optically coupled to the waveguide, and a number of nodes optically coupled to the waveguide. The optical-system clock generates and injects a master optical-clock signal into the waveguide. The master optical-clock signal acquiring a skew as it passes between nodes. Each node extracts a portion of the master optical-clock signal and processes optical signals using the portion of the master optical-clock signal having a different skew for the respective extracting node.

    摘要翻译: 本发明的实施例涉及将故意偏斜的光时钟信号分配给源同步计算机系统的节点的系统和方法。 在一个系统实施例中,源同步系统包括波导,光学耦合到波导的光学系统时钟以及光耦合到波导的多个节点。 光学系统时钟产生并将主光时钟信号注入到波导中。 主光时钟信号在节点之间通过时获取偏斜。 每个节点提取主光时钟信号的一部分,并使用对于相应提取节点具有不同偏斜的主光学时钟信号的部分来处理光信号。

    Computer-Implemented Method for Role Discovery and Simplification in Access Control Systems\
    9.
    发明申请
    Computer-Implemented Method for Role Discovery and Simplification in Access Control Systems\ 有权
    计算机实现的访问控制系统角色发现和简化方法

    公开(公告)号:US20090144803A1

    公开(公告)日:2009-06-04

    申请号:US12348832

    申请日:2009-01-05

    IPC分类号: H04L9/32

    摘要: A method includes selecting a first biclique role in a plurality of roles and finding all roles in the plurality that have a set of vertices of a second type that is a subset of a set of vertices of the second type in the first role; removing each of the subsets from the set of vertices of the second type corresponding to the first role; and reassigning the vertices of the first type to the roles such that original associations between the vertices of the first type and the vertices of the second type are maintained.

    摘要翻译: 一种方法包括在多个角色中选择第一双角色角色,并且发现多个角色中的所有角色具有作为第一角色中第二类型的一组顶点的子集的第二类型的顶点集合; 从对应于第一角色的第二类型的顶点集合中去除每个子集; 并且将第一类型的顶点重新分配给角色,使得保持第一类型的顶点和第二类型的顶点之间的原始关联。

    System and method of optimizing memory usage with data lifetimes
    10.
    发明授权
    System and method of optimizing memory usage with data lifetimes 失效
    利用数据生命周期优化内存使用的系统和方法

    公开(公告)号:US07363459B2

    公开(公告)日:2008-04-22

    申请号:US10284844

    申请日:2002-10-31

    IPC分类号: G06F12/00

    CPC分类号: G06F8/4442

    摘要: A method of storing data includes the steps of storing data comprising the steps of identifying respective lifetimes of each member of an indexed collection of data elements, each of the data elements referenceable in a data index space representing a set of valid data element indices; identifying a set of pairs of the data elements having overlapping lifetimes; and generating a mapping from the data index space to an address offset space based on the set of pairs of the data elements having the overlapping lifetimes.

    摘要翻译: 存储数据的方法包括存储数据的步骤,包括以下步骤:识别索引的数据元素集合的每个成员的相应寿命,每个数据元素可在表示一组有效数据元素索引的数据索引空间中引用; 识别具有重叠生命周期的一组数据元素对; 以及基于具有重叠寿命的数据元素对的集合,生成从数据索引空间到地址偏移空间的映射。