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公开(公告)号：US20100231209A1
公开(公告)日：2010-09-16
申请号：US12402806
申请日：2009-03-12
申请人： Rubina F. Ahmed , Moises Cases , Bradley D. Herrman , Bhyrav M. Mutnury , Pravin Patel , Peter R. Seidel
发明人： Rubina F. Ahmed , Moises Cases , Bradley D. Herrman , Bhyrav M. Mutnury , Pravin Patel , Peter R. Seidel
IPC分类号： G01R31/00
CPC分类号： G01R31/2806 , G01R15/183
摘要： Testing an electrical component, the component including a printed circuit board (‘PCB’) with a number of traces, the traces organized in pairs with each trace of a pair carrying current in opposite directions and separated from one another by a substrate layer of the PCB, where testing of the electrical component includes: dynamically and iteratively until a present impedance for a pair of traces of the component is greater than a predetermined threshold impedance: increasing, by an impedance varying device at the behest of a testing device, magnetic field strength of a magnetic field applied to the pair of traces by the impedance varying device, including increasing the present impedance of the pair of traces; measuring, by the testing device, one or more operating parameters; and recording, by the testing device, the measurements of the operating parameters.
摘要翻译： 测试电气部件，该部件包括具有多个迹线的印刷电路板（“PCB”），该迹线与成对的每个迹线成对地沿着相反的方向承载电流，并且彼此分离由基底层 PCB，其中电气部件的测试包括：动态地和迭代地，直到组件的一对迹线的当前阻抗大于预定阈值阻抗：通过测试装置的阻抗改变装置增加磁场 通过阻抗变化装置施加到该对迹线的磁场的强度，包括增加该对迹线的当前阻抗; 由所述测试装置测量一个或多个操作参数; 并由测试装置记录操作参数的测量值。
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公开(公告)号：US08106666B2
公开(公告)日：2012-01-31
申请号：US12402806
申请日：2009-03-12
申请人： Rubina F. Ahmed , Moises Cases , Bradley D. Herrman , Bhyrav M. Mutnury , Pravin Patel , Peter R. Seidel
发明人： Rubina F. Ahmed , Moises Cases , Bradley D. Herrman , Bhyrav M. Mutnury , Pravin Patel , Peter R. Seidel
IPC分类号： G01R31/02
CPC分类号： G01R31/2806 , G01R15/183
摘要： Testing an electrical component, the component including a printed circuit board (‘PCB’) with a number of traces, the traces organized in pairs with each trace of a pair carrying current in opposite directions and separated from one another by a substrate layer of the PCB, where testing of the electrical component includes: dynamically and iteratively until a present impedance for a pair of traces of the component is greater than a predetermined threshold impedance: increasing, by an impedance varying device at the behest of a testing device, magnetic field strength of a magnetic field applied to the pair of traces by the impedance varying device, including increasing the present impedance of the pair of traces; measuring, by the testing device, one or more operating parameters; and recording, by the testing device, the measurements of the operating parameters.
摘要翻译： 测试电气部件，该部件包括具有多个迹线的印刷电路板（“PCB”），该迹线与成对的每个迹线成对地沿着相反的方向承载电流，并且彼此分离由基底层 PCB，其中电气部件的测试包括：动态地和迭代地，直到组件的一对迹线的当前阻抗大于预定阈值阻抗：通过测试装置的阻抗改变装置增加磁场 通过阻抗变化装置施加到该对迹线的磁场的强度，包括增加该对迹线的当前阻抗; 由所述测试装置测量一个或多个操作参数; 并由测试装置记录操作参数的测量值。
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公开(公告)号：US07956688B2
公开(公告)日：2011-06-07
申请号：US12574923
申请日：2009-10-07
IPC分类号： H03F3/45 , H03K19/094
CPC分类号： H04L25/0274 , H04L25/0284
摘要： Embodiments of the invention include a common mode cancellation circuit and method for correcting signal skew in a differential circuit. According to one embodiment, an op amp circuit is used to correct the mismatch between transmission line lengths in the differential circuit. The CMCC can be embodied as an ASIC and added on to an existing differential signaling systems to correct and compensate for board wiring skew or other causes of phase misalignment. The result is restoration of the cross-over intersection of the plus and minus signals of the differential pair closer to the common voltage level point, as if the signals had been in phase.
摘要翻译： 本发明的实施例包括用于校正差分电路中的信号偏移的共模消除电路和方法。 根据一个实施例，使用运算放大器电路来校正差分电路中的传输线路长度之间的失配。 CMCC可以实现为ASIC，并添加到现有的差分信号系统上，以纠正和补偿电路板布线偏移或相位未对准的其他原因。 结果是恢复差分对的正负信号与公共电压电平点的交叉交叉，好像信号是同相的。
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公开(公告)号：US20110080973A1
公开(公告)日：2011-04-07
申请号：US12574923
申请日：2009-10-07
CPC分类号： H04L25/0274 , H04L25/0284
摘要： Embodiments of the invention include a common mode cancellation circuit and method for correcting signal skew in a differential circuit. According to one embodiment, an op amp circuit is used to correct the mismatch between transmission line lengths in the differential circuit. The CMCC can be embodied as an ASIC and added on to an existing differential signaling systems to correct and compensate for board wiring skew or other causes of phase misalignment. The result is restoration of the cross-over intersection of the plus and minus signals of the differential pair closer to the common voltage level point, as if the signals had been in phase.
摘要翻译： 本发明的实施例包括用于校正差分电路中的信号偏移的共模消除电路和方法。 根据一个实施例，使用运算放大器电路来校正差分电路中的传输线路长度之间的失配。 CMCC可以实现为ASIC，并添加到现有的差分信号系统上，以纠正和补偿电路板布线偏移或相位未对准的其他原因。 结果是恢复差分对的正负信号与公共电压电平点的交叉交叉，好像信号是同相的。
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公开(公告)号：US20120330619A1
公开(公告)日：2012-12-27
申请号：US13164943
申请日：2011-06-21
IPC分类号： G06F17/50
CPC分类号： G06F17/5045 , G06F17/5077
摘要： In a disclosed example, nets are used to represent connections between elements on different pages of an electronic drawing in a software package for computer aided drawings. Previews for these connections are automatically generated, such as during an automated inventory of the electronic drawing. The automatically-generated connection previews are stored in memory, such as in a preview database, for subsequent recall and display. The user may select a net to recall and display the previously generated connection preview. The user may then select the displayed preview to be added to a dynamic workspace, such as by clicking on the connection preview using a pointing device. Elements and connections added to the dynamic workspace are fully editable from the dynamic workspace. Any changes made in the dynamic workspace are updated to the pages containing the changed elements.
摘要翻译： 在公开的示例中，网络用于表示用于计算机辅助附图的软件包中的电子图形的不同页面上的元素之间的连接。 自动生成这些连接的预览，例如在电子图纸的自动清点期间。 自动生成的连接预览存储在内存中，例如预览数据库中，以便后续的调用和显示。 用户可以选择网络来调用并显示先前生成的连接预览。 然后，用户可以选择要添加到动态工作空间的所显示的预览，诸如通过使用指示设备点击连接预览。 添加到动态工作空间的元素和连接可以从动态工作区完全编辑。 在动态工作空间中进行的任何更改都将更新为包含已更改元素的页面。
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