Host computer system emulating target system legacy software and providing for incorporating more powerful application program elements into the flow of the legacy software
    2.
    发明授权
    Host computer system emulating target system legacy software and providing for incorporating more powerful application program elements into the flow of the legacy software 失效
    主机计算机系统模拟目标系统遗留软件,并提供将更强大的应用程序元素并入到传统软件的流程中

    公开(公告)号:US07809547B2

    公开(公告)日:2010-10-05

    申请号:US11324052

    申请日:2005-12-29

    CPC分类号: G06F9/455

    摘要: As manufacturers of very fast and powerful commodity processors continue to improve the capabilities of their products, it has become practical to emulate the proprietary hardware and operating systems of powerful older computers on platforms built using commodity processors such that the manufacturers of the older computers can provide new systems which allow their customers to continue to use their highly-regarded proprietary legacy software on state-of-the-art new computer systems by emulating the older computer in software that runs on the new systems. In an example of the subject invention, a 64-bit Cobol Virtual Machine instruction provides the capability of adding to or improving the performance of legacy 36-bit Cobol code. Legacy Cobol instructions can be selectively diverted, in the host CPU, to a 64 bit Virtual Machine Implementation. The output legacy and new Cobol code is compiled in a dedicated implementation of the Cobol compiler, and the output of the special purpose compiler is emulated in a special purpose software emulator, separate from the main software emulator that handles the normal 36-bit stream of legacy code.

    摘要翻译: 随着非常快速和强大的商品处理器的制造商不断提高其产品的能力,在使用商品处理器构建的平台上模拟强大的旧版计算机的专有硬件和操作系统变得务实,这样老式计算机的制造商可以提供 新系统允许他们的客户通过在新系统上运行的软件模拟旧的计算机,继续使用他们备受赞誉的专有遗留软件在最先进的新计算机系统上。 在本发明的一个示例中,64位Cobol虚拟机指令提供添加或改善传统36位Cobol代码的性能的能力。 传统Cobol指令可以在主机CPU中选择性转移到64位虚拟机实现。 输出遗留和新的Cobol代码是在Cobol编译器的专用实现中编译的,专用编译器的输出在专用软件仿真器中仿真,与主软件仿真器分离,处理正常的36位流 遗留代码

    Performance improvement for software emulation of central processor unit utilizing signal handler
    3.
    发明授权
    Performance improvement for software emulation of central processor unit utilizing signal handler 有权
    使用信号处理器的中央处理器单元的软件仿真性能改进

    公开(公告)号:US07684973B2

    公开(公告)日:2010-03-23

    申请号:US11324050

    申请日:2005-12-29

    IPC分类号: G06F9/455

    CPC分类号: G06F9/30174 G06F9/45504

    摘要: As fast and powerful commodity processors have been developed, it has become practical to emulate on platforms built using commodity processors the proprietary hardware systems of powerful older computers. High performance is typically a key requirement for a system even when built using emulation software. In a hardware design many special cases and conditions which may cause exceptions are detected by logic operating in parallel with the instruction execution. In software these checks can cost extra cycles of processor time during emulation of each instruction and be a significant detriment to performance. Avoiding some of these checks by relying upon the underlying hardware checks of the host system and then using a signal handler and special software to recover from these signals is a way to improve the performance and simplify the coding of the software emulation system.

    摘要翻译: 随着快速而强大的商品处理器的开发,在使用商用处理器的平台上模拟强大的老式计算机的专有硬件系统已成为现实。 即使使用仿真软件构建,高性能通常也是系统的关键要求。 在硬件设计中,许多可能导致异常的特殊情况和条件可以通过与指令执行并行运行的逻辑来检测。 在软件中,这些检查可以在每个指令的仿真期间花费额外的处理器时间周期,并且对性能造成重大的损害。 通过依靠主机系统的基础硬件检查,然后使用信号处理程序和特殊软件从这些信号中恢复来避免其中一些检查是提高性能并简化软件仿真系统编码的一种方式。

    Method and apparatus enabling multi threaded program execution for a Cobol program including OpenMP directives by utilizing a two-stage compilation process
    4.
    发明授权
    Method and apparatus enabling multi threaded program execution for a Cobol program including OpenMP directives by utilizing a two-stage compilation process 有权
    通过利用两阶段编译过程,可以实现包括OpenMP指令在内的Cobol程序的多线程程序执行的方法和装置

    公开(公告)号:US08869126B2

    公开(公告)日:2014-10-21

    申请号:US13729490

    申请日:2012-12-28

    IPC分类号: G06F9/45

    CPC分类号: G06F8/456

    摘要: A method and apparatus is disclosed for compilation of an original Cobol program with support for improved performance by increased parallelism during execution using multiple threads of processing. The approach includes a two stage compilation process, the first compilation/translation step by a first specialized compiler/translator that takes as input a Cobol source program that includes parallelization directives, and produces as output an intermediate computer program in a second computer programming language, the intermediate program including parallelization directives in the second computer programming language. The intermediate program is then compiled utilizing a selected second compiler that provides support for parallelism described in the second programming language. The approach optionally allows for use of pragmas serving as parallelization directives to the compiler in the original Cobol program or in the intermediate program.

    摘要翻译: 公开了一种用于编译原始Cobol程序的方法和装置,其支持通过使用多个处理线程在执行期间通过增加的并行性来提高性能。 该方法包括两阶段编译过程,第一个专业编译器/翻译器的第一个编译/翻译步骤,将包含并行化指令的Cobol源程序作为输入,并以第二计算机编程语言生成中间计算机程序作为输出, 中间程序包括第二计算机编程语言中的并行化指令。 然后使用提供对第二编程语言中描述的并行性的支持的所选择的第二编译器来编译中间程序。 该方法可以允许在原始Cobol程序或中间程序中使用用作并行指令的编译指示给编译器。

    METHOD FOR SUMMARIZED VIEWING OF LARGE NUMBERS OF PERFORMANCE METRICS WHILE RETAINING COGNIZANCE OF POTENTIALLY SIGNIFICANT DEVIATIONS
    5.
    发明申请
    METHOD FOR SUMMARIZED VIEWING OF LARGE NUMBERS OF PERFORMANCE METRICS WHILE RETAINING COGNIZANCE OF POTENTIALLY SIGNIFICANT DEVIATIONS 有权
    在潜在可疑偏差保留认定的情况下,对大量性能指标进行总体查看的方法

    公开(公告)号:US20150169732A1

    公开(公告)日:2015-06-18

    申请号:US14132180

    申请日:2013-12-18

    IPC分类号: G06F17/30

    CPC分类号: G06Q10/00 G06Q10/04

    摘要: A method is disclosed for determining with computing apparatus an adequate number of clusters for summarizing result data that includes a large number of observation data points. The summary data includes a small number of samples of data from each cluster with the number of clusters being large enough to provide a good summary of all the result data without being so large as to make it difficult for one skilled in the art to examine visually all of the summary data generated by the computing apparatus.

    摘要翻译: 公开了一种用于使用计算装置确定足够数量的用于总结包括大量观测数据点的结果数据的聚类的方法。 摘要数据包括来自每个簇的少量数据样本,其中簇的数量足够大以提供所有结果数据的良好总结,而不会太大,使得本领域技术人员难以对视觉进行检查 由计算装置产生的所有汇总数据。

    METHOD AND APPARATUS ENABLING MULTI THREADED PROGRAM EXECUTION FOR A COBOL PROGRAM INCLUDING OPENMP DIRECTIVES BY UTILIZING A TWO-STAGE COMPILATION PROCESS
    6.
    发明申请
    METHOD AND APPARATUS ENABLING MULTI THREADED PROGRAM EXECUTION FOR A COBOL PROGRAM INCLUDING OPENMP DIRECTIVES BY UTILIZING A TWO-STAGE COMPILATION PROCESS 有权
    方法和装置通过利用两阶段编译过程实现包括OPENMP指令的COBOL程序的多线程程序执行

    公开(公告)号:US20140189663A1

    公开(公告)日:2014-07-03

    申请号:US13729490

    申请日:2012-12-28

    IPC分类号: G06F9/45

    CPC分类号: G06F8/456

    摘要: A method and apparatus is disclosed for compilation of an original Cobol program with support for improved performance by increased parallelism during execution using multiple threads of processing. The approach includes a two stage compilation process, the first compilation/translation step by a first specialized compiler/translator that takes as input a Cobol source program that includes parallelization directives, and produces as output an intermediate computer program in a second computer programming language, the intermediate program including parallelization directives in the second computer programming language. The intermediate program is then compiled utilizing a selected second compiler that provides support for parallelism described in the second programming language. The approach optionally allows for use of pragmas serving as parallelization directives to the compiler in the original Cobol program or in the intermediate program.

    摘要翻译: 公开了一种用于编译原始Cobol程序的方法和装置,其支持通过使用多个处理线程在执行期间通过增加的并行性来提高性能。 该方法包括两阶段编译过程,第一个专业编译器/翻译器的第一个编译/翻译步骤,将包含并行化指令的Cobol源程序作为输入,并以第二计算机编程语言生成中间计算机程序作为输出, 中间程序包括第二计算机编程语言中的并行化指令。 然后使用提供对第二编程语言中描述的并行性的支持的所选择的第二编译器来编译中间程序。 该方法可以允许在原始Cobol程序或中间程序中使用用作并行指令的编译指示给编译器。

    Method and apparatus for enabling parallel processing during execution of a Cobol source program using two-stage compilation
    7.
    发明授权
    Method and apparatus for enabling parallel processing during execution of a Cobol source program using two-stage compilation 失效
    在使用两阶段编译的Cobol源程序执行期间实现并行处理的方法和装置

    公开(公告)号:US08370820B2

    公开(公告)日:2013-02-05

    申请号:US12589304

    申请日:2009-10-20

    IPC分类号: G06F9/45

    CPC分类号: G06F8/45

    摘要: A method and apparatus is disclosed for compilation of an original Cobol program and building an executable program with support for improved performance by increased parallelism during execution using multiple threads of processing. The approach includes a compilation (or translation) step utilizing a first compiler or translating program which is a parallel aware translating first compiler. The parallel aware first compiler is a specialized compiler/translator which takes as input a Cobol source program, and produces as output an intermediate computer program in a second computer programming language, the intermediate program including parallelization directives, the intermediate program intended for further compilation utilizing an existing selected second compiler, the second compiler providing support for parallelism for programs described in the second programming language. The approach optionally allows for use of pragmas serving as parallelization directives to the compiler in the original Cobol program or in the intermediate program.

    摘要翻译: 公开了一种用于编译原始Cobol程序和构建可执行程序的方法和装置,其具有通过在使用多个处理线程的执行期间通过增加的并行性来提高性能的支持。 该方法包括使用作为并行感知翻译第一编译器的第一编译器或翻译程序的编译(或翻译)步骤。 并行感知的第一个编译器是一个专门的编译器/翻译器,它将Cobol源程序作为输入,并以第二计算机编程语言生成中间计算机程序作为输出,中间程序包括并行化指令,用于进一步编译的中间程序,利用 现有的选择的第二编译器,第二编译器为第二编程语言中描述的程序提供对并行性的支持。 该方法可以允许在原始Cobol程序或中间程序中使用用作并行指令的编译指示给编译器。

    Method and apparatus for enabling parallel processing during execution of a cobol source program using two-stage compilation
    8.
    发明申请
    Method and apparatus for enabling parallel processing during execution of a cobol source program using two-stage compilation 失效
    在使用两阶段编译的cobol源程序执行期间能够进行并行处理的方法和装置

    公开(公告)号:US20110093837A1

    公开(公告)日:2011-04-21

    申请号:US12589304

    申请日:2009-10-20

    IPC分类号: G06F9/45

    CPC分类号: G06F8/45

    摘要: A method and apparatus is disclosed for compilation of an original Cobol program and building an executable program with support for improved performance by increased parallelism during execution using multiple threads of processing. The approach includes a compilation (or translation) step utilizing a first compiler or translating program which is a parallel aware translating first compiler. The parallel aware first compiler is a specialized compiler/translator which takes as input a Cobol source program, and produces as output an intermediate computer program in a second computer programming language, the intermediate program including parallelization directives, the intermediate program intended for further compilation utilizing an existing selected second compiler, the second compiler providing support for parallelism for programs described in the second programming language. The approach optionally allows for use of pragmas serving as parallelization directives to the compiler in the original Cobol program or in the intermediate program.

    摘要翻译: 公开了一种用于编译原始Cobol程序和构建可执行程序的方法和装置,其具有通过在使用多个处理线程的执行期间通过增加的并行性来提高性能的支持。 该方法包括使用作为并行感知翻译第一编译器的第一编译器或翻译程序的编译(或翻译)步骤。 并行感知的第一个编译器是一个专门的编译器/翻译器,它将Cobol源程序作为输入,并以第二计算机编程语言生成中间计算机程序作为输出,中间程序包括并行化指令,用于进一步编译的中间程序,利用 现有的选择的第二编译器,第二编译器为第二编程语言中描述的程序提供对并行性的支持。 该方法可以允许在原始Cobol程序或中间程序中使用用作并行指令的编译指示给编译器。

    Method and apparatus providing COBOL decimal type arithmetic functions with improved performance
    9.
    发明授权
    Method and apparatus providing COBOL decimal type arithmetic functions with improved performance 有权
    提供具有改进性能的COBOL十进制算术函数的方法和装置

    公开(公告)号:US08856759B2

    公开(公告)日:2014-10-07

    申请号:US12658017

    申请日:2010-02-01

    IPC分类号: G06F9/44 G06F9/45

    摘要: A method and apparatus is disclosed providing an improvement in performance for arithmetic computations by a computer system for calculations which include decimal numeric variables. The improvement in at least one embodiment includes use of a special compiler in cooperation with a special decimal numeric subroutine library. The compiler provides comparative alignment information based upon comparing alignments of a plurality of decimal variables. The decimal subroutine library can then provide improved performance at run time by utilizing the information compared by the compiler at compiler time rather than making those computations repeatedly at run time.

    摘要翻译: 公开了一种方法和装置,其通过计算机系统提供包括十进制数字变量的计算的算术计算性能的改进。 至少一个实施例的改进包括与特殊的十进制数字子程序库协同使用特殊的编译器。 编译器基于比较多个十进制变量的比对来提供比较对齐信息。 然后,十进制子程序库可以通过利用编译器在编译器时比较的信息在运行时提供改进的性能,而不是在运行时重复进行这些计算。

    Method and apparatus providing COBOL decimal type arithmetic functions with improved performance
    10.
    发明申请
    Method and apparatus providing COBOL decimal type arithmetic functions with improved performance 有权
    提供具有改进性能的COBOL十进制算术函数的方法和装置

    公开(公告)号:US20110191755A1

    公开(公告)日:2011-08-04

    申请号:US12658017

    申请日:2010-02-01

    IPC分类号: G06F9/45

    摘要: A method and apparatus is disclosed providing an improvement in performance for arithmetic computations by a computer system for calculations which include decimal numeric variables. The improvement in at least one embodiment includes use of a special compiler in cooperation with a special decimal numeric subroutine library. The compiler provides comparative alignment information based upon comparing alignments of a plurality of decimal variables. The decimal subroutine library can then provide improved performance at run time by utilizing the information compared by the compiler at compiler time rather than making those computations repeatedly at run time.

    摘要翻译: 公开了一种方法和装置,其通过计算机系统提供包括十进制数字变量的计算的算术计算性能的改进。 至少一个实施例的改进包括与特殊的十进制数字子程序库协同使用特殊的编译器。 编译器基于比较多个十进制变量的比对来提供比较对齐信息。 然后,十进制子程序库可以通过利用编译器在编译器时比较的信息在运行时提供改进的性能,而不是在运行时重复进行这些计算。