公开(公告)号：US06728908B1

公开(公告)日：2004-04-27

申请号：US09717800

申请日：2000-11-20

申请人： Ryan Fukuhara ,  Leonard Day ,  Huy H. Luong ,  Robert Rasmussen ,  Savio N. Chau

发明人： Ryan Fukuhara ,  Leonard Day ,  Huy H. Luong ,  Robert Rasmussen ,  Savio N. Chau

IPC分类号： G06F1100

CPC分类号： H04L1/242 ,  G06F11/0757 ,  H04L1/0061 ,  H04L2001/0094

摘要： In an embodiment, a bus controller for connecting a device to an Inter-Integrated Circuit (I2C) bus includes fault tolerance features. The I2C bus controller may support fail silent, cyclic redundancy check (CRC), and byte count check operations. The I2C bus controller may include a control unit connected to an I2C core module having a base address. The I2C bus controller may also include a second I2C core module having a base address plus one (BP1). The I2C bus controller may also include a mute timer that countdowns a mute timeout period. This mute timer may be reset upon receiving a fail silent test message sent by a master on the I2C bus in slave mode, or, in the master mode, from itself through the BP1 I2C core module. If the mute timeout period expires, the control unit may disable the I2C bus controller from transmitting on the I2C bus. The control unit may format CRC values and byte count values into messages, and include a byte counter to compare actual bytes received to the expected byte count indicated by a received byte count value.

摘要翻译： 在一个实施例中，用于将设备连接到集成电路（I2C）总线的总线控制器包括容错特征。 I2C总线控制器可以支持无声，循环冗余校验（CRC）和字节计数检查操作。 I2C总线控制器可以包括连接到具有基地址的I2C核心模块的控制单元。 I2C总线控制器还可以包括具有基地址加1（BP1）的第二I2C内核模块。 I2C总线控制器还可以包括静默定时器，其对静音超时周期进行倒计时。 在从站模式下，在I2C总线上接收到由主站发送的故障无声测试消息，或者在主模式下，通过BP1 I2C内核模块，此静音定时器可能会被复位。 如果静音超时时间到期，则控制单元可能会禁止I2C总线控制器在I2C总线上传输。 控制单元可以将CRC值和字节计数值格式化成消息，并且包括一个字节计数器，用于将接收的实际字节与由接收到的字节计数值指示的预期字节计数进行比较。