公开(公告)号：US10770484B2

公开(公告)日：2020-09-08

申请号：US16298270

申请日：2019-03-11

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sun Park ,  Chungi You ,  Hyuksoon Kwon

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/423 ,  H01L27/32 ,  H01L29/786

Abstract: A thin film transistor including a substrate; a semiconductor layer disposed over the substrate; a gate insulting film disposed over the semiconductor layer; and a gate electrode. The semiconductor layer includes a channel region, a source region, and a drain region. The gate insulating film includes a first region and a second region. The second region borders the first region. The gate electrode is disposed over the first region. A step shape is formed where the second region meets the first region.

公开(公告)号：US10256256B2

公开(公告)日：2019-04-09

申请号：US15379602

申请日：2016-12-15

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sun Park ,  Chungi You ,  Hyuksoon Kwon

IPC: H01L27/12 ,  H01L27/32 ,  H01L29/786 ,  H01L29/66

Abstract: A thin film transistor including a substrate; a semiconductor layer disposed over the substrate; a gate insulting film disposed over the semiconductor layer; and a gate electrode. The semiconductor layer includes a channel region, a source region, and a drain region. The gate insulating film includes a first region and a second region. The second region borders the first region. The gate electrode is disposed over the first region. A step shape is formed where the second region meets the first region.

公开(公告)号：US20170338245A1

公开(公告)日：2017-11-23

申请号：US15379602

申请日：2016-12-15

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： SUN PARK ,  Chungi You ,  Hyuksoon Kwon

IPC: H01L27/12 ,  H01L27/32 ,  H01L29/786

CPC classification number: H01L27/124 ,  H01L27/1225 ,  H01L27/1233 ,  H01L27/1255 ,  H01L27/1288 ,  H01L27/322 ,  H01L27/3246 ,  H01L27/3248 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696

Abstract: A thin film transistor including a substrate; a semiconductor layer disposed over the substrate; a gate insulting film disposed over the semiconductor layer; and a gate electrode. The semiconductor layer includes a channel region, a source region, and a drain region. The gate insulating film includes a first region and a second region. The second region borders the first region. The gate electrode is disposed over the first region. A step shape is formed where the second region meets the first region.