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公开(公告)号：US11195469B2
公开(公告)日：2021-12-07
申请号：US16708344
申请日：2019-12-09
发明人： Chul Kyu Kang , Sung Hwan Kim , Soo Hee Oh , Dong Sun Lee , Sang Moo Choi
IPC分类号： G09G3/30 , G09G3/36 , G09G3/3266 , G09G3/3291 , G09G3/3233
摘要： A stage of a scan driver for a display device, the stage includes: an output unit to output to an output terminal either a signal supplied to a first clock terminal corresponding to voltage of a first driving node or a voltage of a second power source corresponding to voltage of a second driving node; an input unit to control the voltage of the first driving node corresponding to signals supplied to a first input terminal, and the input unit to control the voltage of the second driving node corresponding to signals supplied to a second input terminal and a second clock terminal; a first signal processor including a second capacitor coupled between the second driving node and a second node, the first signal processor to control the voltage of the second driving node corresponding to signals supplied to a third clock terminal and a fourth clock terminal, the first signal processor to control a potential difference between both ends of the second capacitor corresponding to the signal supplied to the fourth clock terminal; and a second signal processor to control the voltage of the first driving node corresponding to the signal supplied to the first clock terminal.
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公开(公告)号：US10770004B2
公开(公告)日：2020-09-08
申请号：US16563636
申请日：2019-09-06
发明人： Sung Hwan Kim , Chul Kyu Kang , Soo Hee Oh , Dong Sun Lee
IPC分类号： G09G3/30 , G09G3/32 , G09G3/3266 , G09G3/3291
摘要： A pixel circuit, includes: an organic light-emitting diode; a first transistor coupled between a second node and a third node, wherein a gate electrode of the first transistor is coupled to a first node; a second transistor coupled between a data line and the second node, wherein a gate electrode of the second transistor is coupled to a first scan line; a fourth transistor coupled between the first node and an initialization power source, wherein a gate electrode of the fourth transistor is coupled to a second scan line; a fifth transistor coupled between a first power source and the second node, wherein a gate electrode of the fifth transistor is coupled to a first emission line; and a sixth transistor and an eighth transistor coupled in series between the third node and the organic light-emitting diode.
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公开(公告)号：US10699616B2
公开(公告)日：2020-06-30
申请号：US16017999
申请日：2018-06-25
发明人： Jun Hyun Park , Keum Nam Kim , Sung Hwan Kim , Kyoung Ju Shin
IPC分类号： G09G3/20
摘要： In a scan driver including a plurality of stages configured to supply scan signals to scan lines, the scan driver includes: an i−1th stage configured to supply an i−1th scan signal to an i−1th scan line while controlling a node Qi−1 (i is a natural number) in response to a first clock signal, a third clock signal, and a control voltage; an ith stage configured to supply an ith scan signal to an ith scan line while controlling a node Qi in response to a second clock signal, a fourth clock signal, and the control voltage; and a controller connected to the i−1th stage and the ith stage, and configured to supply the control voltage.
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公开(公告)号：US10276103B2
公开(公告)日：2019-04-30
申请号：US15647703
申请日：2017-07-12
发明人： Jun Hyun Park , Sung Hwan Kim , Byung Geun Jun
IPC分类号： G09G3/3266
摘要： A stage includes an output, first and second controllers, and first and second inputs. The output supplies a scan signal to a first output terminal and a carry signal to a second output terminal based on first and second node voltages and a first clock signal supplied to a first input terminal. The first controller controls a third node voltage based on a voltage of the second output terminal. The second controller controls the second node voltage based on the first clock signal supplied to the first input terminal and the third node voltage. The first input controls the first and third node voltages based on a carry signal of a previous stage supplied to a second input terminal. The second input controls the first and third node voltages based on the second node voltage and a carry signal of a next stage supplied to a third input terminal.
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公开(公告)号：US20180308409A1
公开(公告)日：2018-10-25
申请号：US16017999
申请日：2018-06-25
发明人： Jun Hyun Park , Keum Nam Kim , Sung Hwan Kim , Kyoung Ju Shin
IPC分类号： G09G3/20
CPC分类号： G09G3/20 , G09G2310/0267 , G09G2310/0286
摘要： In a scan driver including a plurality of stages configured to supply scan signals to scan lines, the scan driver includes: an i−1th stage configured to supply an i−1th scan signal to an i−1th scan line while controlling a node Qi−1 (i is a natural number) in response to a first clock signal, a third clock signal, and a control voltage; an ith stage configured to supply an ith scan signal to an ith scan line while controlling a node Qi in response to a second clock signal, a fourth clock signal, and the control voltage; and a controller connected to the i−1th stage and the ith stage, and configured to supply the control voltage.
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公开(公告)号：US11967269B2
公开(公告)日：2024-04-23
申请号：US17938031
申请日：2022-10-04
发明人： Chul Kyu Kang , Sung Hwan Kim , Soo Hee Oh , Dong Sun Lee , Sang Moo Choi
CPC分类号： G09G3/32 , G09G2310/0267 , G09G2310/08
摘要： A scan driver includes: a first transistor having a first electrode coupled to an output scan line, a second electrode coupled to a first power line, and a gate electrode coupled to a first node; a second transistor having a first electrode coupled to a first clock line, a second electrode coupled to the output scan line, and a gate electrode coupled to a second node; a third transistor having a first electrode coupled to the first node, a second electrode coupled to a first input scan line, and a gate electrode coupled to a second clock line; and a fourth transistor having a first electrode coupled to the second node and a second electrode and a gate electrode, which are coupled to a second input scan line, wherein the first input scan line and the second input scan line are different from each other.
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公开(公告)号：US11521561B2
公开(公告)日：2022-12-06
申请号：US17395979
申请日：2021-08-06
发明人： Sung Hwan Kim , Chul Kyu Kang , Hyun-Chol Bang , Soo Hee Oh , Dong Sun Lee
IPC分类号： G09G3/3291 , G09G3/3266 , H01L27/32
摘要： A display device includes: scan, control, and emission control signal lines, signals transmitted thereby being different from one another; data and driving voltage lines; a first transistor including a first gate electrode and first source and drain; a second transistor including a second gate electrode connected to a first scan line, a second source connected to a first data line, and a second drain connected to the first source; a light-emitting element; a control transistor including a control gate electrode connected to a first control line and between the driving voltage line and the first source or the light-emitting element and the first drain; and an emission control transistor in series between the light-emitting element and the control transistor, the control transistor and the first transistor, or the driving voltage line and the control transistor, and an emission control gate electrode connected to the emission control signal line.
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公开(公告)号：US11195896B2
公开(公告)日：2021-12-07
申请号：US16433182
申请日：2019-06-06
发明人： Sung Hwan Kim , Won Kyu Kwak , Sang Moo Choi , Ji-Hyun Ka , Chul Kyu Kang , Dong Wook Kim , Won Se Lee
摘要： An organic light emitting diode display includes a substrate, a semiconductor layer on the substrate, the semiconductor layer including a doped area and an undoped area, a first insulation layer that covers the semiconductor layer, a first conductor on the first insulation layer, a second insulation layer that covers the first conductor, a second conductor on the second insulation layer, a third insulation layer that covers the second conductor, and a third conductor on the third insulation layer, wherein, in the semiconductor layer that overlaps the first conductor, the doped area is between undoped areas.
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公开(公告)号：US10928941B2
公开(公告)日：2021-02-23
申请号：US16299280
申请日：2019-03-12
发明人： In Nam Lee , Young Sik Kim , Hyun Jae Lee , Mi Young Kim , Sung Hwan Kim , Chang Bum Kim , Hyung Chul Kim
摘要： An input sensing device includes a first base layer, a plurality of first sensing electrodes, a plurality of second sensing electrodes, a plurality of third sensing electrodes, and a plurality of fourth sensing electrodes. The first sensing electrodes are arranged on the first base layer along a first direction. The second sensing electrodes are arranged on the first base layer in different rows from the first sensing electrodes. The third sensing electrodes are arranged on the second sensing electrodes along a second direction different from the first direction. The third sensing electrodes overlap the second sensing electrodes. The fourth sensing electrodes are arranged on the same layer as the third sensing electrodes and overlap the first sensing electrodes. A constant voltage is applied to the third sensing electrodes during a touch pressure sensing operation.
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公开(公告)号：US10706784B2
公开(公告)日：2020-07-07
申请号：US15950516
申请日：2018-04-11
发明人： Sung Hwan Kim , Bon Yong Koo , Sun Kwang Kim , Chong Chul Chai
IPC分类号： G09G3/3266 , G09G3/36
摘要： A stage circuit includes an output circuit configured to supply, to a first output terminal, a first clock signal supplied to a second input terminal or to supply a voltage of a second power source supplied to a second power input terminal, in response to voltages of a first node and a second node, an input circuit configured to control voltages of a third node and a fourth node in response to a shift pulse or a gate start pulse supplied to a first input terminal, a third clock signal supplied to a third input terminal, and a fourth clock signal supplied to a fourth input terminal, and a first driver configured to control the voltages of the first and second nodes in response to both the third clock signal and the voltages of the third and fourth nodes.
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