公开(公告)号：US20230207217A1

公开(公告)日：2023-06-29

申请号：US18071205

申请日：2022-11-29

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Soo Jeong JO ,  Dae Hee LEE ,  Hyo Jin KIM ,  Jong Ho LEE

IPC: H01G4/30 ,  H01G4/12 ,  H01G4/012

CPC classification number: H01G4/30 ,  H01G4/12 ,  H01G4/012

Abstract: A multilayer capacitor includes a body including a dielectric layer and a plurality of internal electrodes stacked with the dielectric layer interposed therebetween and including a first conductive metal and external electrodes disposed on an external surface of the body and including a second conductive metal, wherein the ratio of internal electrodes including an alloy region of the first and second conductive metals to the plurality of internal electrodes is 40 to 80%.

公开(公告)号：US20250166923A1

公开(公告)日：2025-05-22

申请号：US18910108

申请日：2024-10-09

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Sung Been IM ,  Dae Hee LEE

IPC: H01G4/30 ,  H01G2/06 ,  H01G4/008 ,  H01G4/012 ,  H01G4/12

Abstract: A multilayer electronic component includes: a body including a dielectric layer and internal electrodes; and an external electrode disposed on the body, wherein the external electrode may include a connection electrode layer disposed on the body and connected to the internal electrodes and including a conductive metal, a band electrode layer in contact with the connection electrode layer and disposed on the body and including a conductive polymer, and a plating layer disposed on the connection electrode layer and the band electrode layer, and the conductive metal may include at least one selected from the group consisting of palladium (Pd), silver (Ag), rhodium (Rh), and ruthenium (Ru).

公开(公告)号：US20250140475A1

公开(公告)日：2025-05-01

申请号：US18809756

申请日：2024-08-20

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Sun Ju HWANG ,  Dae Hee LEE

IPC: H01G4/008 ,  H01G4/012 ,  H01G4/12 ,  H01G4/30

Abstract: A method of manufacturing a multilayer electronic component includes disposing first internal electrode patterns including a first main portion and a first convex portion, thicker than the first main portion, at a first gap, on a first dielectric green sheet, and forming a first sheet by applying a first dielectric paste to the first gap and the first internal electrode patterns, disposing second internal electrode patterns including a second main portion and a second convex portion, thicker than the second main portion, at a second gap, on a second dielectric green sheet, and forming a second sheet by applying a second dielectric paste to the second gap and the second internal electrode patterns, forming a laminated bar by alternately disposing the first sheet and the second sheet, forming a laminate by cutting the laminated bar, and forming an external electrode on the laminate.

公开(公告)号：US20230411080A1

公开(公告)日：2023-12-21

申请号：US18239916

申请日：2023-08-30

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Dong Jun JUNG ,  Dae Hee LEE ,  Hyun KIM ,  Yun KIM

IPC: H01G4/30 ,  H01G4/012 ,  H01G4/12 ,  C04B35/468 ,  H01G4/008

CPC classification number: H01G4/30 ,  H01G4/012 ,  H01G4/1227 ,  C04B2235/66 ,  H01G4/008 ,  C04B2235/6583 ,  C04B35/468

Abstract: A ceramic electronic component includes a body including a dielectric layer and an internal electrode; and an external electrode disposed on the body and connected to the internal electrode. The dielectric layer includes a plurality of crystal grains and a grain boundary disposed between adjacent crystal grains. A ratio (C2/C1) of an Mg content (C2) of the grain boundary to an Mg content (C1) of at least one of the plurality of crystal grains is 3 or more.

公开(公告)号：US20240312713A1

公开(公告)日：2024-09-19

申请号：US18584412

申请日：2024-02-22

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Dae Hee LEE ,  Seung Min KANG ,  Hong Seok KIM ,  Chang Hak CHOI

IPC: H01G4/224 ,  H01G4/008 ,  H01G4/012 ,  H01G4/12 ,  H01G4/30

CPC classification number: H01G4/224 ,  H01G4/008 ,  H01G4/012 ,  H01G4/1209 ,  H01G4/30

Abstract: A multilayer electronic component includes a body including a dielectric layer including Ba and Ti and an internal electrode alternately disposed with the dielectric layer, and including first and second surfaces opposing each other in a first direction, third and fourth surfaces connected to the first and second surfaces and opposing each other in a second direction, and fifth and sixth surfaces connected to the first to fourth surfaces and opposing each other in a third direction; a side margin portion disposed on the fifth and sixth surfaces; and external electrodes disposed on the third and fourth surfaces, wherein the side margin portion includes Sn and a transition metal, and wherein, in the side margin portion, a mole ratio of transition metal to Sn is 10 or more.

公开(公告)号：US20220130615A1

公开(公告)日：2022-04-28

申请号：US17406456

申请日：2021-08-19

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Dong Jun JUNG ,  Dae Hee LEE ,  Hyun KIM ,  Yun KIM

IPC: H01G4/30 ,  H01G4/012 ,  H01G4/12 ,  H01G4/008 ,  C04B35/468

Abstract: A ceramic electronic component includes a body including a dielectric layer and an internal electrode; and an external electrode disposed on the body and connected to the internal electrode. The dielectric layer includes a plurality of crystal grains and a grain boundary disposed between adjacent crystal grains. A ratio (C2/C1) of an Mg content (C2) of the grain boundary to an Mg content (C1) of at least one of the plurality of crystal grains is 3 or more.

公开(公告)号：US20180082933A1

公开(公告)日：2018-03-22

申请号：US15469709

申请日：2017-03-27

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Tae Ho KO ,  Dae Hee LEE ,  Bong Soo KIM ,  Myeong Ho HONG ,  Do Young JEONG ,  Joon Seok OH

IPC: H01L23/498 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/49816 ,  H01L23/3171 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/06 ,  H01L24/14 ,  H01L2224/02373 ,  H01L2224/0401 ,  H01L2224/12105

Abstract: A fan-out semiconductor package includes a first connection member having a through-hole, a semiconductor chip disposed in the through-hole, a first encapsulant encapsulating at least portions of the first connection member and the semiconductor chip, a second connection member disposed on the first connection member and the semiconductor chip. The first connection member and the second connection member respectively include redistribution layers electrically connected to the connection pads of the semiconductor chip. The fan-out semiconductor package may have excellent rigidity, may be thinned, and may be manufactured in a simplified process.