公开(公告)号：US20180315810A1

公开(公告)日：2018-11-01

申请号：US15896320

申请日：2018-02-14

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Doo Ho YOO ,  Jung Il KIM ,  Young Key KIM ,  Jung Min NAM

IPC: H01L49/02 ,  H05K1/16 ,  H01L23/10 ,  H01L23/31

CPC classification number: H01L28/20 ,  H01L23/10 ,  H01L23/3114 ,  H05K1/167

Abstract: A chip resistor includes a base substrate having a first surface and a second surface opposing each other, two side surfaces connecting the first surface and the second surface, and two end surfaces connecting the first surface and the second surface, a resistive layer disposed on the second surface of the base substrate, the resistive layer having a first surface in contact with the base substrate and a second surface opposing the first surface of the resistive layer, a first terminal and a second terminal spaced apart from each other and each being connected to the resistive layer on the second surface of the resistive layer, and a third terminal connected to the resistive layer on the second surface of the resistive layer, disposed between the first terminal and the second terminal, and extending to the first surface of the base substrate along the side surfaces.

公开(公告)号：US20180315524A1

公开(公告)日：2018-11-01

申请号：US15835291

申请日：2017-12-07

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jung Min NAM ,  Doo Ho YOO ,  Young Key KIM

IPC: H01C1/148 ,  H01C1/01 ,  H01C1/142 ,  H05K1/16

CPC classification number: H01C1/148 ,  H01C1/01 ,  H01C1/142 ,  H01C7/00 ,  H05K1/167 ,  H05K3/3442 ,  H05K2201/10022

Abstract: A chip resistance element includes a base substrate having a first surface and a second surface opposing each other, two sides connecting the first surface and the second surface to each other, and two end surfaces connecting the first surface and the second surface to each other; a resistive layer disposed on the second surface; and a first terminal, a second terminal, and a third terminal disposed to be respectively connected to the resistive layer and to be separated from each other on the second surface. The third terminal having a second surface portion disposed between the first terminal and the second terminal on the second surface and a side portion connected to and disposed on one of the two sides of the base substrate.

公开(公告)号：US20190245030A1

公开(公告)日：2019-08-08

申请号：US16389225

申请日：2019-04-19

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Doo Ho YOO ,  Jung Il KIM ,  Young Key KIM ,  Jung Min NAM

IPC: H01L49/02 ,  H05K1/16 ,  H01L23/10 ,  H01C7/00 ,  H01L23/31

CPC classification number: H01L28/20 ,  H01C1/01 ,  H01C1/142 ,  H01C7/00 ,  H01C7/003 ,  H01C17/006 ,  H01L23/10 ,  H01L23/3114 ,  H05K1/167 ,  H05K3/3431 ,  H05K2201/10022

Abstract: A chip resistor includes a base substrate having a first surface and a second surface opposing each other, two side surfaces connecting the first surface and the second surface, and two end surfaces connecting the first surface and the second surface, a resistive layer disposed on the second surface of the base substrate, the resistive layer having a first surface in contact with the base substrate and a second surface opposing the first surface of the resistive layer, a first terminal and a second terminal spaced apart from each other and each being connected to the resistive layer on the second surface of the resistive layer, and a third terminal connected to the resistive layer on the second surface of the resistive layer, disposed between the first terminal and the second terminal, and extending to the first surface of the base substrate along the side surfaces.