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公开(公告)号:US20200066453A1
公开(公告)日:2020-02-27
申请号:US16164453
申请日:2018-10-18
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Young Bin JEONG , Hoe Chul JUNG , Chi Hwa LEE
Abstract: A multilayer capacitor includes a body including dielectric layers and first and second internal electrodes and first and second external electrodes disposed on opposing ends of the body and connected to the first and second internal electrodes, respectively, wherein ends of the first and second internal electrodes are bent toward the center of the body in a thickness direction and exposed to opposing end surfaces of the body and upper and lower surfaces of the first and second external electrodes are coplanar with upper and lower surfaces of the body, respectively.
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公开(公告)号:US20230080684A1
公开(公告)日:2023-03-16
申请号:US17859557
申请日:2022-07-07
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Tae Yoon KIM , Joo Young KIM , Won Hyeong KIM , Hyung Sub WOO , Hyung Joon JEON , Young Bin JEONG
IPC: H01G4/30 , H01G4/12 , H01G4/012 , C04B35/626 , C04B35/468 , C04B35/64
Abstract: A ceramic electronic component includes: a body including dielectric layers and internal electrodes; and external electrodes disposed on the body and connected to the internal electrodes, wherein the dielectric layer includes a plurality of first secondary phases, the first secondary phase is a secondary phase including Ni, Mg, Al, Si, and O, and at least one of the plurality of first secondary phases has a ratio of a major axis length to a minor axis length of 4 or more.
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公开(公告)号:US20250157739A1
公开(公告)日:2025-05-15
申请号:US18882247
申请日:2024-09-11
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Young Bin JEONG , Hyung Jong CHOI , Kwan Hee YUN , Hyun Tak KIM , Jin Sung LEE , Boo Min NOH , Min Woo KIM
Abstract: A multilayer electronic component includes: a body including a dielectric layer and internal electrodes, and having first and second surfaces opposing each other in a first direction, third and fourth surfaces opposing each other in a second direction, and fifth and sixth surfaces opposing each other in a third direction and external electrodes including a connection portion disposed on the third or fourth surfaces and a band portion extending onto portions of the first and second surfaces from the connection portion. The external electrode includes a base alloy layer including Cu—Ag alloy and disposed in the band portion, a lower electrode layer in contact with the internal electrode at the connection portion and in contact with the base alloy layer at the band portion, and an upper electrode layer disposed on the lower electrode layer. The lower electrode layer includes Cu, and the upper electrode layer includes Ag and glass.
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公开(公告)号:US20250157738A1
公开(公告)日:2025-05-15
申请号:US18822951
申请日:2024-09-03
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Hyun Tak KIM , Hyung Jong CHOI , Young Bin JEONG , Chung Eun LEE
Abstract: A multilayer electronic component includes: a body including a dielectric layer and internal electrodes alternately disposed while having the dielectric layer interposed therebetween; and external electrodes disposed on the body, wherein the external electrodes include a lower electrode layer including copper (Cu) and glass, an intermediate electrode layer including copper (Cu) and disposed on the lower electrode layer, and an upper electrode layer including silver (Ag) and glass and disposed on the intermediate electrode layer, and an area fraction occupied by a pore in the intermediate electrode layer is smaller than an area fraction occupied by a pore in the lower electrode layer.
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公开(公告)号:US20250157737A1
公开(公告)日:2025-05-15
申请号:US18813587
申请日:2024-08-23
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Young Bin JEONG , Hyung Jong CHOI , Kwan Hee YUN , Hyun Tak KIM , Jin Sung LEE , Boo Min NOH , Min Woo KIM
Abstract: A multilayer electronic component includes: a body including a dielectric layer and internal electrodes alternately disposed while having the dielectric layer interposed therebetween; and external electrodes disposed outside the body, wherein the external electrode includes a lower electrode layer including copper (Cu) and in contact with the internal electrode, an upper electrode layer including silver (Ag) and disposed on the lower electrode layer, and an alloy layer including a copper (Cu)-silver (Ag) alloy and disposed at an interface between the lower electrode layer and the upper electrode layer, and an oxidation region including copper (Cu) oxide is disposed on at least a portion of an external surface of the lower electrode layer.
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公开(公告)号:US20200051748A1
公开(公告)日:2020-02-13
申请号:US16279188
申请日:2019-02-19
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Kum Jin PARK , Kwang Hee NAM , Young Bin JEONG , Myung Woo LEE , Jong Han KIM
Abstract: A multilayer ceramic capacitor includes: a ceramic body including dielectric layers and first internal electrodes and second internal electrodes disposed to face each other with one of the dielectric layers interposed therebetween; and first and second external electrodes disposed on external surfaces of the ceramic body and electrically connected to the first and second internal electrodes, respectively. The dielectric layer includes dielectric grains, a grain boundary is present between at least two dielectric grains of the dielectric grains, and a Si/Ti mole ratio in the grain boundary satisfies 15% to 40%.
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公开(公告)号:US20200051747A1
公开(公告)日:2020-02-13
申请号:US16169926
申请日:2018-10-24
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Kum Jin PARK , Kwang Hee NAM , Young Bin JEONG , Myung Woo LEE , Jong Han KIM
Abstract: A multilayer ceramic capacitor includes: a ceramic body including dielectric layers and first internal electrodes and second internal electrodes disposed to face each other with one of the dielectric layers interposed therebetween; and first and second external electrodes disposed on external surfaces of the ceramic body and electrically connected to the first and second internal electrodes, respectively. The dielectric layer includes dielectric grains, a grain boundary is present between at least two dielectric grains of the dielectric grains, and a Si/Ti mole ratio in the grain boundary satisfies 15% to 40%.
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