公开(公告)号：US20230034654A1

公开(公告)日：2023-02-02

申请号：US17702259

申请日：2022-03-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yong Ho KIM ,  Bo In NOH ,  Jeong Hoon AHN

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/10

Abstract: A semiconductor package is provided. The semiconductor package includes: a first stack including a first semiconductor substrate; a through via that penetrates the first semiconductor substrate in a first direction; a second stack that includes a second face facing a first face of the first stack, on the first stack; a first pad that is in contact with the through via, on the first face of the first stack; a second pad including a concave inner side face that defines an insertion recess, the second pad located on the second face of the second stack; and a bump that connects the first pad and the second pad, wherein the bump includes a first upper bump on the first pad, and a first lower bump between the first upper bump and the first pad.

公开(公告)号：US20230317539A1

公开(公告)日：2023-10-05

申请号：US17986995

申请日：2022-11-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Bo In NOH ,  Jeong Hoon AHN ,  Yun Ki CHOI

IPC: H01L23/31 ,  H01L25/065 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L23/3135 ,  H01L23/49833 ,  H01L24/32 ,  H01L24/16 ,  H01L24/73 ,  H01L23/315 ,  H01L23/49822 ,  H01L2924/1434 ,  H01L2924/1431 ,  H01L2924/3511 ,  H01L2224/73204 ,  H01L2224/16014 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2924/1616 ,  H01L2924/16235 ,  H01L2924/16251 ,  H01L2924/1632 ,  H01L2924/1811 ,  H01L2924/1815 ,  H01L2924/182 ,  H01L2924/183 ,  H01L2924/186 ,  H01L2224/3201 ,  H01L2224/32055 ,  H01L2224/32053 ,  H01L2224/32059 ,  H01L23/49816 ,  H01L25/0655

Abstract: A semiconductor package includes a circuit board, an interposer structure on the circuit board, a first semiconductor chip and a second semiconductor chip on the interposer structure, the first and the second semiconductor chips electrically connected to the interposer structure and spaced apart from each other, and a mold layer between the first and second semiconductor chips, the mold layer separating the first and second semiconductor chips. A slope of a side wall of the mold layer is constant as the side wall extends away from an upper side of the interposer structure, and an angle defined by a bottom side of the mold layer and the side wall of the mold layer is less than or equal to ninety degrees.