公开(公告)号：US20190109095A1

公开(公告)日：2019-04-11

申请号：US16195293

申请日：2018-11-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Byoung-Gug Min ,  Sungil Cho ,  Jaehoon Choi ,  Shi-kyung Kim

IPC: H01L23/552 ,  H01L23/29 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00

Abstract: Semiconductor packages and a methods for manufacturing a semiconductor package are provided. The method includes providing a package including a substrate, a semiconductor chip provided on the substrate, and a molding layer provided on the substrate and covering the semiconductor chip, the substrate including a ground pattern exposed at one surface of the substrate; and applying a solution including metal particles and a conductive carbon material onto the molding layer to form a shielding layer covering the molding layer. The shielding layer includes the metal particles and the conductive carbon material connected to at least one of the metal particles. The shielding layer extends onto the one surface of the substrate and is electrically connected to the ground pattern.

公开(公告)号：US11296037B2

公开(公告)日：2022-04-05

申请号：US16668289

申请日：2019-10-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Byoung-Gug Min ,  Younhee Kang ,  Min-Woo Song

IPC: H01L23/552 ,  H01L23/498 ,  H01L25/00

Abstract: A semiconductor package including a first semiconductor chip having an upper surface, a lower surface that is opposite to the upper surface, and a sidewall between the upper surface and the lower surface; a capping insulation layer covering the upper surface and the sidewall of the first semiconductor chip; and a shielding layer on the capping insulation layer, wherein a lower portion of the capping insulation layer includes a laterally protruding capping protrusion contacting a lower surface of the shielding layer.

公开(公告)号：US10410974B2

公开(公告)日：2019-09-10

申请号：US16195293

申请日：2018-11-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Byoung-Gug Min ,  Sungil Cho ,  Jaehoon Choi ,  Shi-kyung Kim

IPC: H01L23/552 ,  H01L23/29 ,  H01L23/31 ,  H01L21/56 ,  H01L23/00

Abstract: Semiconductor packages and a methods for manufacturing a semiconductor package are provided. The method includes providing a package including a substrate, a semiconductor chip provided on the substrate, and a molding layer provided on the substrate and covering the semiconductor chip, the substrate including a ground pattern exposed at one surface of the substrate; and applying a solution including metal particles and a conductive carbon material onto the molding layer to form a shielding layer covering the molding layer. The shielding layer includes the metal particles and the conductive carbon material connected to at least one of the metal particles. The shielding layer extends onto the one surface of the substrate and is electrically connected to the ground pattern.

公开(公告)号：US11862571B2

公开(公告)日：2024-01-02

申请号：US17693545

申请日：2022-03-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Byoung-Gug Min ,  Younhee Kang ,  Min-Woo Song

IPC: H01L23/552 ,  H01L23/498 ,  H01L25/00

CPC classification number: H01L23/552 ,  H01L23/498 ,  H01L25/00

Abstract: A semiconductor package including a first semiconductor chip having an upper surface, a lower surface that is opposite to the upper surface, and a sidewall between the upper surface and the lower surface; a capping insulation layer covering the upper surface and the sidewall of the first semiconductor chip; and a shielding layer on the capping insulation layer, wherein a lower portion of the capping insulation layer includes a laterally protruding capping protrusion contacting a lower surface of the shielding layer.

公开(公告)号：US11011473B2

公开(公告)日：2021-05-18

申请号：US16519788

申请日：2019-07-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Younhee Kang ,  Byoung-Gug Min ,  Shi-Kyung Kim ,  Min-Woo Song ,  Jae-Seon Hwang

IPC: H01L23/29 ,  H01L21/00 ,  H01L23/552 ,  H01L23/31 ,  H01L23/00

Abstract: Disclosed is a semiconductor package comprising a substrate, a semiconductor chip on the substrate, a molding layer on the substrate covering the semiconductor chip, and a shield layer on the molding layer. The shield layer includes a polymer in which a plurality of conductive structures and a plurality of nano-structures are distributed wherein at least some of the conductive structures are connected to one another.

公开(公告)号：US10177096B2

公开(公告)日：2019-01-08

申请号：US15622708

申请日：2017-06-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Byoung-Gug Min ,  Sungil Cho ,  Jaehoon Choi ,  Shi-kyung Kim

IPC: H01L29/93 ,  H01L23/552 ,  H01L23/29 ,  H01L23/31 ,  H01L21/56 ,  H01L23/00

Abstract: Semiconductor packages and a methods for manufacturing a semiconductor package are provided. The method includes providing a package including a substrate, a semiconductor chip provided on the substrate, and a molding layer provided on the substrate and covering the semiconductor chip, the substrate including a ground pattern exposed at one surface of the substrate; and applying a solution including metal particles and a conductive carbon material onto the molding layer to form a shielding layer covering the molding layer. The shielding layer includes the metal particles and the conductive carbon material connected to at least one of the metal particles. The shielding layer extends onto the one surface of the substrate and is electrically connected to the ground pattern.