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公开(公告)号：US10937519B2
公开(公告)日：2021-03-02
申请号：US16813889
申请日：2020-03-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Yong-Jun Lee , Tae-Hui Na , Chea-Ouk Lim
Abstract: A memory device includes a memory cell array, a write/read circuit, a control circuit and an anti-fuse array. The memory cell array includes a plurality of nonvolatile memory cells. The write/read circuit performs a write operation to write write data in a target page of the memory cell array, verifies the write operation by comparing read data read from the target page with the write data and outputs a pass/fail signal indicating one of a pass or a fail of the write operation based on a result of the comparing. The control circuit controls the write/read circuit and selectively outputs an access address of the target page as a fail address in response to the pass/fail signal. The anti-fuse array in which the fail address is programmed, outputs a repair address that replaces the fail address.
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公开(公告)号：US20190156909A1
公开(公告)日：2019-05-23
申请号：US16128879
申请日：2018-09-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Yong-Jun Lee , Tae-Hui Na , Chea-Ouk Lim
Abstract: A memory device includes a memory cell array, a write/read circuit, a control circuit and an anti-fuse array. The memory cell array includes a plurality of nonvolatile memory cells. The write/read circuit performs a write operation to write write data in a target page of the memory cell array, verifies the write operation by comparing read data read from the target page with the write data and outputs a pass/fail signal indicating one of a pass or a fail of the write operation based on a result of the comparing. The control circuit controls the write/read circuit and selectively outputs an access address of the target page as a fail address in response to the pass/fail signal. The anti-fuse array in which the fail address is programmed, outputs a repair address that replaces the fail address.
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