公开(公告)号：US20210389369A1

公开(公告)日：2021-12-16

申请号：US17412760

申请日：2021-08-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeong-Goo LEE ,  Dae Han KIM ,  Ji Yun KIM ,  Jin Yub LEE

IPC: G01R31/28 ,  H01L21/66 ,  G01R31/26

Abstract: Provided are a semiconductor device and a method of operating the same. A semiconductor includes a test circuit which comprises: a test transistor to be tested for time-dependent dielectric breakdown (TDDB) characteristics using a stress voltage; an input switch disposed between a voltage application node to which the stress voltage is applied and an input node which transmits the stress voltage to the test transistor; and a protection switch disposed between the input node and a ground node.

公开(公告)号：US20230067813A1

公开(公告)日：2023-03-02

申请号：US17736250

申请日：2022-05-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyung Soo KIM ,  Dae Han KIM ,  Jong Min KIM ,  Myoung Won YOON

IPC: G11C16/24 ,  G11C16/04 ,  G11C16/08 ,  G11C29/12

Abstract: A method for operating a memory device is provided. The method includes providing a high voltage signal to a memory cell array including a plurality of memory cells using a first wiring, providing a logic signal to the memory cell array using a second wiring, and providing a shielding signal to the memory cell array using a third wiring arranged between the first wiring and the second wiring. A highest voltage level of the logic signal is lower than a highest voltage level of the high voltage signal, and the shielding signal includes a negative first voltage level in a first mode and a positive second voltage level in a second mode.