公开(公告)号：US20140175569A1

公开(公告)日：2014-06-26

申请号：US14190346

申请日：2014-02-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： WeonHong KIM ,  Dae-Kwon JOO ,  Hajin LIM ,  Jinho DO ,  Kyungil HONG ,  Moonkyun SONG

IPC: H01L29/51

CPC classification number: H01L29/512 ,  H01L21/28202 ,  H01L21/28255 ,  H01L21/823462 ,  H01L21/823857 ,  H01L29/1054 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66545

Abstract: A method of fabricating a semiconductor device includes forming a lower interfacial layer on a semiconductor layer, the lower interfacial layer being a nitride layer, forming an intermediate interfacial layer on the lower interfacial layer, the intermediate interfacial layer being an oxide layer, and forming a high-k dielectric layer on the intermediate interfacial layer. The high-k dielectric layer has a dielectric constant that is higher than dielectric constants of the lower interfacial layer and the intermediate interfacial layer.

Abstract translation: 制造半导体器件的方法包括在半导体层上形成下界面层，下界面层为氮化物层，在下界面层上形成中间界面层，中间界面层为氧化物层，形成 中间界面层上的高k电介质层。 高k电介质层的介电常数高于下界面层和中间界面层的介电常数。

公开(公告)号：US20140124872A1

公开(公告)日：2014-05-08

申请号：US14152616

申请日：2014-01-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： WeonHong KIM ,  Dae-Kwon JOO

IPC: H01L29/51

CPC classification number: H01L29/517 ,  H01L21/28088 ,  H01L21/28176 ,  H01L21/28185 ,  H01L21/28202 ,  H01L21/82345 ,  H01L21/823462 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/518 ,  H01L29/78

Abstract: A method of fabricating a semiconductor device includes providing a semiconductor substrate having a first region and a second region, forming a nitrogen-containing lower gate insulating layer on the semiconductor substrate, forming an upper gate insulating layer on the nitrogen containing lower gate insulating layer, forming a lower metal layer on the upper gate insulating layer; and selectively removing the lower metal layer in the first region such that a lower metal layer pattern remains in the second region, wherein the upper gate insulating layer in the first region prevents the lower gate insulating layer in the first region from being etched during removing of the lower metal layer in the first region. A semiconductor device fabricated by the method is also provided.

Abstract translation: 一种制造半导体器件的方法包括提供具有第一区域和第二区域的半导体衬底，在半导体衬底上形成含氮下部栅极绝缘层，在含氮的下部栅极绝缘层上形成上部栅极绝缘层， 在上栅极绝缘层上形成下金属层; 并且选择性地去除第一区域中的下金属层，使得下部金属层图案保留在第二区域中，其中第一区域中的上栅极绝缘层防止在去除第一区域期间第一区域中的下栅极绝缘层被蚀刻 第一区域中的下金属层。 还提供了通过该方法制造的半导体器件。