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公开(公告)号:US20240155844A1
公开(公告)日:2024-05-09
申请号:US18415460
申请日:2024-01-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Myung Hun Lee , Dong Ha Shin , Pan Suk Kwak , Dae Seok Byeon
CPC classification number: H10B43/50 , H01L23/535 , H10B41/27 , H10B41/41 , H10B41/50 , H10B43/27 , H10B43/40
Abstract: A semiconductor memory device includes a mold structure including gate electrodes stacked on a first substrate, a channel structure that penetrates a first region of the mold structure to cross the gate electrodes, a first through structure that penetrates a second region of the mold structure, and a second through structure that penetrates a third region of the mold structure. The mold structure further includes memory cell blocks extending in a first direction and spaced apart in a second direction, and a dummy block extending in the first direction and disposed between the memory cell blocks. Each of the memory cell blocks and the dummy block includes a cell region and an extension region arranged in the first direction. The first region is the cell region of one of the memory cell blocks, the second region is the extension region of the one of the memory cell blocks, and the third region is the extension region of the dummy block.
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公开(公告)号:US11950425B2
公开(公告)日:2024-04-02
申请号:US17313649
申请日:2021-05-06
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Myung Hun Lee , Dong Ha Shin , Pan Suk Kwak , Dae Seok Byeon
CPC classification number: H10B43/50 , H01L23/535 , H10B41/27 , H10B41/41 , H10B41/50 , H10B43/27 , H10B43/40
Abstract: A mold structure includes gate electrodes stacked on a first substrate, a channel structure penetrating a first region of the mold structure to cross the gate electrodes, a first through structure penetrating a second region of the mold structure, and a second through structure penetrating a third region of the mold structure. The mold structure includes memory cell blocks extending in a first direction and spaced apart in a second direction, and a dummy block extending in the first direction and disposed between the memory cell blocks. Each of the memory cell and dummy blocks includes a cell region and an extension region arranged in the first direction. The first region is the cell region of one of the memory cell blocks, the second region is the extension region of the one of the memory cell blocks, and the third region is the extension region of the dummy block.
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