公开(公告)号：US20240061458A1

公开(公告)日：2024-02-22

申请号：US18501721

申请日：2023-11-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seki KIM ,  Shangho KIM ,  Yongjin LEE ,  Hyongmin LEE ,  Dongha LEE ,  Byeongbae LEE ,  Sungyong LEE

IPC: G05F1/575

CPC classification number: G05F1/575

Abstract: A system-on-chip according to an embodiment includes a core including a header switch circuit configured to transmit a power supply voltage applied to a first power rail as a supply voltage to a second power rail and a logic circuit configured to operate based on the supply voltage from the second power rail, and a low-dropout (LDO) regulator configured to regulate a magnitude of first current output to the second power rail based on a change in the supply voltage, wherein the LDO regulator is further configured to control on/off of a plurality of first header switches included in the header switch circuit based on an amount of the change in the supply voltage.

公开(公告)号：US20240248502A1

公开(公告)日：2024-07-25

申请号：US18402577

申请日：2024-01-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seki KIM ,  Susie KIM ,  Dongha LEE ,  Takahiro NOMIYAMA

IPC: G05F1/575 ,  G05F1/565 ,  G05F3/26

CPC classification number: G05F1/575 ,  G05F1/565 ,  G05F3/262

Abstract: A system-on-chip includes a low-dropout (LDO) regulator configured to regulate a voltage of input power and to supply operation power to a core through an output mode, the core configured to receive the operation power to perform an operation, and a power supply circuit configured to supply the input power to the LDO regulator. The power supply circuit may receive first power and second power having different voltage characteristics, and may supply third power, which is power having a higher voltage of the first power and the second power, and the second power to the LDO regulator as the input power.

公开(公告)号：US20220293507A1

公开(公告)日：2022-09-15

申请号：US17514088

申请日：2021-10-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaehyun LIM ,  Younghwan PARK ,  Kwangjin LEE ,  Dongha LEE ,  Hyuntaek CHOI

IPC: H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  G06K9/00

Abstract: A fingerprint sensor package includes a first substrate including a core insulating layer; a first bonding pad on the core insulating layer; and an external connection pad between an edge of the second surface of the core insulating layer and the first bonding pad, a second substrate on the core insulating layer, the second substrate including: a plurality of first sensing patterns spaced apart in a first direction and extending in a second direction intersecting with the first direction; a plurality of second sensing patterns spaced apart from each other in the second direction and extending in the first direction; and a second bonding pad, a conductive wire connecting the first bonding pad to the second bonding pad; a controller chip on the second substrate; and a molding layer covering the second substrate and the first bonding pad and spaced apart from the external connection pad.