Abstract:
A memory controller and an operating method of a memory controller are provided. The operating method includes detecting that a bus of an external host connected with the memory controller enters a first power saving mode; entering a second power saving mode of the memory controller according to a result of the detecting; detecting a wake-up process of the bus of the external host; and waking up the memory controller while the bus of the external host executes the wake-up process. The waking up of the memory controller is ended before the wake-up process of the bus of the external host is completed.
Abstract:
A memory controller is provided. The memory controller may comprise a first interface configured to provide an interface for communications with a host, and a second interface configured to communicate with the host through the first interface and to provide an interface for communications with a memory. The second interface may include an emulation engine configured to generate a Direct Memory Access (DMA) setup Frame Information Structure (FIS) including ready state information for data communications with the host in response to a command transferred from the host. The second interface may include a storage engine configured to access the host to fetch a physical region descriptor (PRD) before the DMA setup FIS is received from the emulation engine.
Abstract:
A data transferring method of a storage device is provided. The method may include transferring a first data to a first outbound area, transferring the first data sent to the first outbound area to a first area of a main memory corresponding to a first address programmed by an address translation unit, transferring a second data to a second outbound area in response to an indication that the address translation unit is to be reprogrammed, and transferring the second data sent to the second outbound area to the first outbound area.
Abstract:
A memory controller and an operating method of a memory controller are provided. The operating method includes receiving a command issue from the external host; fetching a command corresponding to the command issue from a memory of the external host in response to the command issue; and controlling the external memory to perform the fetched command. The command is fetched immediately after the command issue is received independently from an execution of a previously fetched command. The memory controller includes a first interface which communicates with a host; and a second interface which communicates with the first interface and with an external memory and is recognized as storage by the host. The memory controller performs the operating method,