公开(公告)号：US20220149210A1

公开(公告)日：2022-05-12

申请号：US17584545

申请日：2022-01-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung Mo KANG ,  Moon Seung YANG ,  Jongryeol YOO ,  Sihyung LEE ,  Sunguk JANG ,  Eunhye CHOI

IPC: H01L29/786 ,  H01L29/08 ,  H01L29/423 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/311

Abstract: A semiconductor device includes a channel pattern including first and second semiconductor patterns stacked on a substrate, a gate electrode covering top and lateral surfaces of the channel pattern and extending in a first direction, and including a first gate segment between the first semiconductor pattern and the second semiconductor pattern, a gate spacer covering a lateral surface of the gate electrode and including an opening exposing the channel pattern, and a first source/drain pattern on a side of the gate spacer and in contact with the channel pattern through the opening, the first source/drain pattern including a sidewall center thickness at a height of the first gate segment and at a center of the opening, and a sidewall edge thickness at the height of the first gate segment and at an edge of the opening, the sidewall edge thickness being about 0.7 to 1 times the sidewall center thickness.

公开(公告)号：US20220115500A1

公开(公告)日：2022-04-14

申请号：US17560865

申请日：2021-12-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eunhye CHOI ,  Seung Mo KANG ,  Jungtaek KIM ,  Moon Seung YANG ,  Jongryeol YOO

IPC: H01L29/10 ,  H01L29/66 ,  H01L29/78 ,  H01L29/423 ,  H01L29/08

Abstract: A semiconductor device including an insulating layer on a substrate; channel semiconductor patterns stacked on the insulating layer and vertically spaced apart from each other; a gate electrode crossing the channel semiconductor patterns; source/drain regions respectively at both sides of the gate electrode and connected to each other through the channel semiconductor patterns, the source/drain regions having concave bottom surfaces; and air gaps between the insulating layer and the bottom surfaces of the source/drain regions.

公开(公告)号：US20200381564A1

公开(公告)日：2020-12-03

申请号：US16774653

申请日：2020-01-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung Mo KANG ,  Moon Seung YANG ,  Jongryeol YOO ,  Sihyung LEE ,  Sunguk JANG ,  Eunhye CHOI

IPC: H01L29/786 ,  H01L29/423 ,  H01L29/08

Abstract: A semiconductor device includes a channel pattern including first and second semiconductor patterns stacked on a substrate, a gate electrode covering top and lateral surfaces of the channel pattern and extending in a first direction, and including a first gate segment between the first semiconductor pattern and the second semiconductor pattern, a gate spacer covering a lateral surface of the gate electrode and including an opening exposing the channel pattern, and a first source/drain pattern on a side of the gate spacer and in contact with the channel pattern through the opening, the first source/drain pattern including a sidewall center thickness at a height of the first gate segment and at a center of the opening, and a sidewall edge thickness at the height of the first gate segment and at an edge of the opening, the sidewall edge thickness being about 0.7 to 1 times the sidewall center thickness.