公开(公告)号：US20210201992A1

公开(公告)日：2021-07-01

申请号：US16984801

申请日：2020-08-04

申请人： Samsung Electronics Co., Ltd.

发明人： Garam Kim

IPC分类号： G11C11/56 ,  G11C16/04 ,  G11C16/08 ,  G11C16/10 ,  G11C16/24 ,  G11C16/26 ,  H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  G06N3/04

摘要： A memory device includes a memory cell array including M memory cells connected to one bit line and configured to distributively store N-bit data, where N is a natural number and M is a natural number of 2 or more and N or less, the M memory cells including a first memory cell and a second memory cell having different sensing margins, and a memory controller including a page buffer, the memory controller configured to distributively store the N-bit data in the M memory cells and to sequentially read data stored in the M memory cells to obtain the N-bit data, and an operation logic configured to execute an operation using the N-bit data, the memory controller configured to provide different reading voltages to the first memory cell and the second memory cell.

公开(公告)号：US11594293B2

公开(公告)日：2023-02-28

申请号：US17336910

申请日：2021-06-02

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Garam Kim ,  Hyunggon Kim ,  Jisang Lee ,  Joonsuc Jang ,  Wontaeck Jung

IPC分类号： G11C16/12 ,  G11C16/34 ,  G11C16/24 ,  G11C16/26 ,  G11C16/30

摘要： A memory device includes a memory cell array including a plurality of memory cells; a voltage generator configured to generate voltages used for a program operation and a verify operation for the memory cells; and control logic configured to perform a plurality of program loops while writing data to the memory cell array, such that first to N-th (e.g., N>=1) program loops including a program operation and a verify operation are performed and at least two program loops in which the verify operation is skipped are performed when a pass/fail determination of the program operation in the N-th program loop indicates a pass.

公开(公告)号：US11380390B2

公开(公告)日：2022-07-05

申请号：US16984801

申请日：2020-08-04

申请人： Samsung Electronics Co., Ltd.

发明人： Garam Kim

IPC分类号： G11C11/56 ,  G11C16/04 ,  G11C16/08 ,  G11C16/10 ,  G11C16/24 ,  G11C16/26 ,  H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  G06N3/04

摘要： A memory device includes a memory cell array including M memory cells connected to one bit line and configured to distributively store N-bit data, where N is a natural number of 2 or more and M is a natural number of 2 or more and less than or equal to N, the M memory cells including a first memory cell and a second memory cell having different sensing margins, and a memory controller including a page buffer, the memory controller configured to distributively store the N-bit data in the M memory cells and to sequentially read data stored in the M memory cells to obtain the N-bit data, and an operation logic configured to execute an operation using the N-bit data, the memory controller configured to provide different reading voltages to the first memory cell and the second memory cell.