Abstract:
A semiconductor memory device performs a modified read operation or a modified write operation. The semiconductor memory device includes a memory cell array, a read circuit, and a write circuit. The semiconductor memory device further includes an operation unit performing an operation on read data obtained by the read circuit according to operation assignment information applied through an address line to reduce memory access time when entering a modified read mode. In addition, the semiconductor memory device may optionally manage a normal read mode and the modified read mode and allow operation result data output from the operation unit to be written by the write circuit in the modified read mode.
Abstract:
A method of operating a memory device includes: checking for errors in data read from a first address of a memory cell array of the memory device; counting the number of errors that occurred in the data read from the first address; receiving a first command for data read from the first address; determining whether the number of errors that occurred in the data read from the first address is greater than or equal to a first value; and mapping the first address to a second address, if the number of errors that occurred in the data read from the first address is greater than or equal to the first value.