公开(公告)号：US20170032125A1

公开(公告)日：2017-02-02

申请号：US15198636

申请日：2016-06-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Heonsoo LEE ,  Hyesoo LEE ,  Yun-Ho YOUM

IPC: G06F21/57 ,  G06F1/24 ,  G06F21/77 ,  G08B21/18

CPC classification number: G06F21/57 ,  G06F1/28 ,  G06F21/77 ,  G06F2221/034 ,  G06F2221/2101 ,  G08B21/18 ,  G08B21/182

Abstract: A glitch detector, an electronic device including the glitch detector, and a method of generating an alarm signal are provided. The glitch detector includes a clock generator configured to generate a clock corresponding to a power voltage, a counter configured to count the clock generated by the clock generator and to output a count value, and a comparator configured to compare a reference value with the count value output by the counter and to generate an alarm signal based on a result of the comparison.

Abstract translation: 提供了一种毛刺检测器，包括毛刺检测器的电子设备和产生警报信号的方法。 毛刺检测器包括：时钟发生器，被配置为产生对应于电源电压的时钟;配置为对时钟发生器产生的时钟进行计数并输出计数值的计数器;以及比较器，被配置为将参考值与计数值进行比较 由计数器输出，并根据比较结果生成报警信号。

公开(公告)号：US20170054550A1

公开(公告)日：2017-02-23

申请号：US15227499

申请日：2016-08-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hong-Mook Choi ,  Heonsoo LEE ,  Sang-Hyun PARK

IPC: H04L9/06 ,  H04L9/30 ,  G06F21/60

CPC classification number: G06F21/602 ,  H04L9/0637 ,  H04L2209/12 ,  H04L2209/34

Abstract: A method for encryption, decryption, or encryption and decryption of data in a crypto device having at least one crypto core may include: generating a tweak value corresponding to block data, which is placed at a random position from which the encryption, decryption, or encryption and decryption starts, from among sequential block data; and/or performing the encryption, decryption, or encryption and decryption from the block data using the tweak value. A method for encryption, decryption, or encryption and decryption of block data may include: generating a tweak value corresponding to the block data at a random position; and/or performing the encryption, decryption, or encryption and decryption of the block data using the tweak value.

Abstract translation: 一种用于在具有至少一个密码核心的加密装置中对数据进行加密，解密或加密和解密的方法可以包括：生成对应于块数据的调整值，该块数据位于随机位置，加密，解密或 从顺序块数据开始加密和解密; 和/或使用调整值从块数据执行加密，解密或加密和解密。 块数据的加密，解密或加密和解密方法可以包括：在随机位置生成对应于块数据的调整值; 和/或使用调整值来执行块数据的加密，解密或加密和解密。

公开(公告)号：US20240289278A1

公开(公告)日：2024-08-29

申请号：US18654803

申请日：2024-05-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Heonsoo LEE ,  Byungchul Hong ,  Junseok Park ,  Jaehun Chung

IPC: G06F12/0862 ,  G06F9/38 ,  G06F12/02 ,  G06F12/06

CPC classification number: G06F12/0862 ,  G06F9/3816 ,  G06F12/0261 ,  G06F12/0646

Abstract: In some embodiments, a multi-port queueing cache includes a plurality of first ports, a plurality of second ports, a plurality of request handlers respectively coupled to the plurality of first ports, a cache storage unit coupled to the plurality of second ports, a reserve interface configured to exchange at least one address and at least one reserved cache line number, and a request interface configured to exchange the at least one reserved cache line number and at least one data. The reserve interface and the request interface are disposed between the plurality of request handlers and the cache storage unit. The cache storage unit includes a plurality of cache lines configured to store the plurality of data. The cache storage unit is configured to output a portion of the plurality of addresses, and receive a portion of the plurality of data corresponding to the portion of the plurality of addresses.

公开(公告)号：US20230195636A1

公开(公告)日：2023-06-22

申请号：US18072929

申请日：2022-12-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Heonsoo LEE ,  Byungchul HONG ,  Junseok PARK ,  Jaehun CHUNG

IPC: G06F12/0862 ,  G06F12/06 ,  G06F12/02 ,  G06F9/38

CPC classification number: G06F12/0862 ,  G06F12/0646 ,  G06F12/0261 ,  G06F9/3816

Abstract: In some embodiments, a multi-port queueing cache includes a plurality of first ports, a plurality of second ports, a plurality of request handlers respectively coupled to the plurality of first ports, a cache storage unit coupled to the plurality of second ports, a reserve interface configured to exchange at least one address and at least one reserved cache line number, and a request interface configured to exchange the at least one reserved cache line number and at least one data. The reserve interface and the request interface are disposed between the plurality of request handlers and the cache storage unit. The cache storage unit includes a plurality of cache lines configured to store the plurality of data. The cache storage unit is configured to output a portion of the plurality of addresses, and receive a portion of the plurality of data corresponding to the portion of the plurality of addresses.