公开(公告)号：US11848043B2

公开(公告)日：2023-12-19

申请号：US17689064

申请日：2022-03-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung Min You ,  Ho-Youn Kim ,  Won-Hyung Song ,  Hi Jung Kim

IPC: G11C11/406 ,  G11C11/408

CPC classification number: G11C11/406 ,  G11C11/4085 ,  G11C11/4087

Abstract: A memory device includes memory cells connected to a first word-line, wherein the memory cells include a data region in which data is stored and a counting value backup region in which the number of times the first word-line is activated is backed up, a counting table for storing a first row address corresponding to the first word-line and a first counting value as a counting result of the number of times the first word-line is activated, and a comparator configured to compare the first counting value with a first backed-up counting value stored in the counting value backup region; and when the first counting value is greater than the first backed-up counting value, back up the first counting value in the counting value backup region, or when the first backed-up counting value is greater than the first counting value, overwrite the first backed-up counting value into the counting table.

公开(公告)号：US12014769B2

公开(公告)日：2024-06-18

申请号：US17876046

申请日：2022-07-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae Pil Lee ,  Hi Jung Kim ,  Kwang Sook Noh

IPC: G11C11/4091 ,  G11C11/4094 ,  G11C11/4096 ,  G11C11/4099

CPC classification number: G11C11/4091 ,  G11C11/4094 ,  G11C11/4096 ,  G11C11/4099

Abstract: A volatile memory device may include; a first sense amplifier, a second sense amplifier spaced apart from the first sense amplifier in a first direction, a first mat disposed between the first sense amplifier and the second sense amplifier and including a first bit line connected to the first sense amplifier and a second bit line connected to the second sense amplifier, a third sense amplifier spaced apart from the second sense amplifier in a second direction, a fourth sense amplifier spaced apart from the third sense amplifier in the first direction, and a second mat disposed between the third sense amplifier and the fourth sense amplifier and including a first complementary bit line connected to the first sense amplifier.