Volatile memory device
    1.
    发明授权

    公开(公告)号:US12176021B2

    公开(公告)日:2024-12-24

    申请号:US17875908

    申请日:2022-07-28

    Abstract: A volatile memory device having a reduced area may include; a row decoder extending in a first direction, a column decoder extending in a second direction, a cell region between the row decoder and the column decoder and including a first sense amplifier and a first bit line connected to the first sense amplifier, and a first peripheral circuit region spaced apart from the cell region in the first direction and including includes a first complementary bit line connected to the first sense amplifier. The first sense amplifier may be configured to perform a read/write operation in relation to a first memory cell connected to the first bit line using the first complementary bit line.

    Volatile memory device
    2.
    发明授权

    公开(公告)号:US12014769B2

    公开(公告)日:2024-06-18

    申请号:US17876046

    申请日:2022-07-28

    CPC classification number: G11C11/4091 G11C11/4094 G11C11/4096 G11C11/4099

    Abstract: A volatile memory device may include; a first sense amplifier, a second sense amplifier spaced apart from the first sense amplifier in a first direction, a first mat disposed between the first sense amplifier and the second sense amplifier and including a first bit line connected to the first sense amplifier and a second bit line connected to the second sense amplifier, a third sense amplifier spaced apart from the second sense amplifier in a second direction, a fourth sense amplifier spaced apart from the third sense amplifier in the first direction, and a second mat disposed between the third sense amplifier and the fourth sense amplifier and including a first complementary bit line connected to the first sense amplifier.

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