公开(公告)号：US20230276628A1

公开(公告)日：2023-08-31

申请号：US18312782

申请日：2023-05-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Young-Jin JUNG ,  Bong Tae PARK ,  Ho Jun SEONG

IPC: H10B43/27 ,  H01L23/522 ,  H01L23/528 ,  H10B43/10 ,  H10B43/40 ,  H10B43/50

CPC classification number: H10B43/27 ,  H01L23/5226 ,  H01L23/528 ,  H10B43/10 ,  H10B43/40 ,  H10B43/50

Abstract: A nonvolatile memory device with improved operation performance and reliability, and a method for fabricating the same are provided. The nonvolatile memory device includes a substrate, a peripheral circuit structure on the substrate, a mold structure including a plurality of insulating patterns and a plurality of gate electrodes stacked alternately on the peripheral circuit structure, a channel structure penetrating the mold structure, a first impurity pattern in contact with first portions of the channel structure and having a first conductivity type, on the mold structure, and a second impurity pattern in contact with second portions of the channel structure and having a second conductivity type different from the first conductivity type, on the mold structure.

公开(公告)号：US20240055486A1

公开(公告)日：2024-02-15

申请号：US18492445

申请日：2023-10-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ji Young KIM ,  Dong-Sik LEE ,  Joon-Sung LIM ,  Bum Kyu KANG ,  Ho Jun SEONG

IPC: H01L29/10 ,  H10B43/27

CPC classification number: H01L29/1037 ,  H10B43/27

Abstract: A semiconductor device includes a substrate, a first stack structure on the substrate and includes a plurality of first gate electrodes, a second stack structure on the first stack structure and includes a plurality of second gate electrodes, a channel hole including a first lower channel hole that extends through a lower portion of the first stack structure, a first upper channel hole connected to the first lower channel hole, and a second channel hole connected to the first upper channel hole, and a channel structure in the channel hole. A side wall of the first lower channel hole has a first inclination relative to the first direction, a side wall of the first upper channel hole has a second inclination relative to the first direction, and a side wall of the second channel hole has a third inclination relative to the first direction.

公开(公告)号：US20220336586A1

公开(公告)日：2022-10-20

申请号：US17504312

申请日：2021-10-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ji Young KIM ,  Dong-Sik LEE ,  Joon-Sung LIM ,  Bum Kyu KANG ,  Ho Jun SEONG

IPC: H01L29/10 ,  H01L27/11582

Abstract: A semiconductor device includes a substrate, a first stack structure on the substrate and includes a plurality of first gate electrodes, a second stack structure on the first stack structure and includes a plurality of second gate electrodes, a channel hole including a first lower channel hole that extends through a lower portion of the first stack structure, a first upper channel hole connected to the first lower channel hole, and a second channel hole connected to the first upper channel hole, and a channel structure in the channel hole. A side wall of the first lower channel hole has a first inclination relative to the first direction, a side wall of the first upper channel hole has a second inclination relative to the first direction, and a side wall of the second channel hole has a third inclination relative to the first direction.

公开(公告)号：US20210343740A1

公开(公告)日：2021-11-04

申请号：US17360013

申请日：2021-06-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Young-Jin JUNG ,  Bong Tae PARK ,  Ho Jun SEONG

IPC: H01L27/11582 ,  H01L27/11573 ,  H01L27/11565 ,  H01L27/11575 ,  H01L23/522 ,  H01L23/528

Abstract: A nonvolatile memory device with improved operation performance and reliability, and a method for fabricating the same are provided. The nonvolatile memory device includes a substrate, a peripheral circuit structure on the substrate, a mold structure including a plurality of insulating patterns and a plurality of gate electrodes stacked alternately on the peripheral circuit structure, a channel structure penetrating the mold structure, a first impurity pattern in contact with first portions of the channel structure and having a first conductivity type, on the mold structure, and a second impurity pattern in contact with second portions of the channel structure and having a second conductivity type different from the first conductivity type, on the mold structure.

公开(公告)号：US20210036009A1

公开(公告)日：2021-02-04

申请号：US16818294

申请日：2020-03-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Young-Jin JUNG ,  Bong Tae PARK ,  Ho Jun SEONG

IPC: H01L27/11582 ,  H01L27/11573 ,  H01L23/528 ,  H01L27/11575 ,  H01L23/522 ,  H01L27/11565

Abstract: A nonvolatile memory device with improved operation performance and reliability, and a method for fabricating the same are provided. The nonvolatile memory device includes a substrate, a peripheral circuit structure on the substrate, a mold structure including a plurality of insulating patterns and a plurality of gate electrodes stacked alternately on the peripheral circuit structure, a channel structure penetrating the mold structure, a first impurity pattern in contact with first portions of the channel structure and having a first conductivity type, on the mold structure, and a second impurity pattern in contact with second portions of the channel structure and having a second conductivity type different from the first conductivity type, on the mold structure.