公开(公告)号：US11921626B2

公开(公告)日：2024-03-05

申请号：US17882088

申请日：2022-08-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hosang Yoon ,  Seungwon Lee

IPC: G06F12/02 ,  G06F3/06 ,  G06F9/30 ,  G06F12/0802 ,  G06F12/1045

CPC classification number: G06F12/0238 ,  G06F3/0604 ,  G06F3/0655 ,  G06F3/0673 ,  G06F9/30047 ,  G06F9/30101 ,  G06F12/0802 ,  G06F12/1054 ,  G06F12/1063 ,  G06F2212/72

Abstract: A processing-in-memory includes: a memory; a register configured to store offset information; and an internal processor configured to: receive an instruction and a reference physical address of the memory from a memory controller, determine an offset physical address of the memory based on the offset information, determine a target physical address of the memory based on the reference physical address and the offset physical address, and perform the instruction by accessing the target physical address.

公开(公告)号：US11907575B2

公开(公告)日：2024-02-20

申请号：US17483083

申请日：2021-09-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hosang Yoon ,  Seungwon Lee

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0656 ,  G06F3/0679

Abstract: A memory controller includes: a first buffer configured to receive a memory request from a host and store therein the received memory request; a command generator configured to generate a first command corresponding to the memory request, and set a type of the first command indicating whether an address comprised in the memory request corresponds to a processing in memory (PIM) memory; a second buffer configured to store therein a plurality of commands comprising the first command; and a command scheduler configured to determine whether to change an order of the first command stored in the second buffer based on the type of the first command.

公开(公告)号：US11442851B2

公开(公告)日：2022-09-13

申请号：US17201539

申请日：2021-03-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hosang Yoon ,  Seungwon Lee

IPC: G06F12/00 ,  G06F12/02 ,  G06F12/1045 ,  G06F9/30

Abstract: A processing-in-memory includes: a memory; a register configured to store offset information; and an internal processor configured to: receive an instruction and a reference physical address of the memory from a memory controller, determine an offset physical address of the memory based on the offset information, determine a target physical address of the memory based on the reference physical address and the offset physical address, and perform the instruction by accessing the target physical address.

公开(公告)号：US11868657B2

公开(公告)日：2024-01-09

申请号：US17472990

申请日：2021-09-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyunsoo Kim ,  Seungwon Lee ,  Seungwoo Seo ,  Hosang Yoon

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0679

Abstract: A memory controller, a method of operating the memory controller, and an electronic device including the memory controller are disclosed. The method of operating a memory controller, comprising receiving, from a host core, a plurality of commands for a memory, identifying, from among the plurality of commands, processing in memory (PIM) commands to execute one or more operations in the memory, verifying ordering information from a data field in each of the PIM commands, and reordering the PIM commands based on the ordering information and transmitting the reordered PIM commands to the memory.