公开(公告)号：US20230019282A1

公开(公告)日：2023-01-19

申请号：US17853148

申请日：2022-06-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hoyoung SHIN ,  Bora KIM ,  Junho KIM

IPC: H03L7/099 ,  H03L7/107 ,  H03L7/081 ,  H03L7/083 ,  H03K19/173 ,  G06F7/58

Abstract: A random number generator includes a ring oscillator, an inversion selecting circuit, and controller. The ring oscillator includes an inverter chain having at least one inverter and generates an output signal. The inversion selecting circuit controlling a phase inverter configured to invert a signal of the inverter chain. The controller is configured to operate the inversion selecting circuit to provide an output of the first phase inverter to the inverter chain during a first operation mode to measure a frequency of the ring oscillator and operate the inversion selecting circuit to not provide the output of the phase inverter during a second operation mode for generating a random number.

公开(公告)号：US20220084563A1

公开(公告)日：2022-03-17

申请号：US17376401

申请日：2021-07-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hoyoung SHIN

IPC: G11C7/06 ,  G11C7/04 ,  G11C7/02 ,  G11C7/12

Abstract: Disclosed is a memory device, which includes a memory cell, a bit line connected to the memory cell, a controller that generates at least one current control code, a first current generator that generates a first current having a proportional to absolute temperature (PTAT) characteristic, based on the at least one current control code from the controller, a second current generator that generates a second current having a complementary to absolute temperature (CTAT) characteristic, based on the at least one current control code from the controller, a subtractor that generates a third current by subtracting the second current from the first current, and a sense amplifier that controls a load current to be supplied to the bit line based on the third current, and generates a bit line compensation current for compensating for a leakage current of the bit line.