公开(公告)号：US20210210494A1

公开(公告)日：2021-07-08

申请号：US17186936

申请日：2021-02-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HYUN-JUNG LEE ,  JOON-SEOK MOON ,  DONGSOO WOO

IPC: H01L27/108 ,  H01L21/28 ,  H01L21/3213 ,  H01L29/49 ,  H01L29/06

Abstract: A semicondcutor device, and a method of fabricating the semiconductor device including forming on a substrate a device isolation layer defining a plurality of active regions; and forming a plurality of gate lines intersecting the active regions and buried in the substrate. The forming of the gate lines includes forming on the substrate a trench that intersects the active regions; forming a work-function control layer on a sidewall and a bottom surface of the trench; forming a conductive layer on the work-function control layer; sequentially forming a barrier layer and a source layer on the work-function control layer and the conductive layer, the source layer including a work-function control element; and diffusing the work-function control element from the source layer into an upper portion of the work-function control layer.

公开(公告)号：US20200219884A1

公开(公告)日：2020-07-09

申请号：US16550192

申请日：2019-08-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HYUN-JUNG LEE ,  JOON-SEOK MOON ,  DONGSOO WOO

IPC: H01L27/108 ,  H01L29/06 ,  H01L29/49 ,  H01L21/3213 ,  H01L21/28

Abstract: A semicondcutor device, and a method of fabricating the semiconductor device including forming on a substrate a device isolation layer defining a plurality of active regions; and forming a plurality of gate lines intersecting the active regions and buried in the substrate. The forming of the gate lines includes forming on the substrate a trench that intersects the active regions; forming a work-function control layer on a sidewall and a bottom surface of the trench; forming a conductive layer on the work-function control layer; sequentially forming a barrier layer and a source layer on the work-function control layer and the conductive layer, the source layer including a work-function control element; and diffusing the work-function control element from the source layer into an upper portion of the work-function control layer.

公开(公告)号：US20220302124A1

公开(公告)日：2022-09-22

申请号：US17837962

申请日：2022-06-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HYUN-JUNG LEE ,  JOON-SEOK MOON ,  DONGSOO WOO

IPC: H01L27/108 ,  H01L29/06 ,  H01L21/28 ,  H01L21/3213 ,  H01L29/49

Abstract: A semiconductor device, and a method of fabricating the semiconductor device including forming on a substrate a device isolation layer defining a plurality of active regions; and forming a plurality of gate lines intersecting the active regions and buried in the substrate. The forming of the gate lines includes forming on the substrate a trench that intersects the active regions; forming a work-function control layer on a sidewall and a bottom surface of the trench; forming a conductive layer on the work-function control layer; sequentially forming a barrier layer and a source layer on the work-function control layer and the conductive layer, the source layer including a work-function control element; and diffusing the work-function control element from the source layer into an upper portion of the work-function control layer.

公开(公告)号：US20190165122A1

公开(公告)日：2019-05-30

申请号：US16026097

申请日：2018-07-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JOON-SEOK MOON ,  DONG SIK KONG ,  SUNG WON YOO ,  HEE SUN JOO ,  KYO-SUK CHAE

IPC: H01L29/51 ,  H01L29/78 ,  H01L29/423

CPC classification number: H01L29/513 ,  H01L27/10823 ,  H01L27/10876 ,  H01L29/4236 ,  H01L29/7827

Abstract: A semiconductor device includes a substrate, device isolation film defining an active region of the substrate in which a gate trench extends, a gate insulating film disposed along sides and a bottom of the gate trench, a gate electrode disposed on the gate insulating film in the gate trench and having a first portion, a second portion on the first portion, and a third portion on the second portion, a first barrier film pattern interposed between the first portion of the gate electrode and the gate insulating film, a second barrier film pattern interposed between the second portion of the gate electrode and the gate insulating film, and a third barrier film pattern interposed between the third portion of the gate electrode and the gate insulating film. The work function of the first barrier film pattern is greater than the work function of the second barrier film pattern and less than the work function of the third barrier film pattern.