公开(公告)号：US11024218B2

公开(公告)日：2021-06-01

申请号：US17023563

申请日：2020-09-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyun-Wook Lim ,  Dong-Myun Lee ,  Jae-Suk Yu ,  Kil-Hoon Lee ,  Jae-Youl Lee

IPC: G09G3/20 ,  G09G3/36 ,  G09G5/00 ,  G09G3/3275

Abstract: A method of driving a display by communicating with a controller through a first channel and a second channel includes; generating recovery data from a signal received through the first channel during a frame data period, detecting a vertical blank period between frame data periods, checking a training trigger event history during the vertical blank period, and during the vertical blank period, transmitting a training request direct to the first channel through the second channel when there is a training trigger event history.

公开(公告)号：US10810928B2

公开(公告)日：2020-10-20

申请号：US16168036

申请日：2018-10-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyun-Wook Lim ,  Dong-Myung Lee ,  Jae-Suk Yu ,  Kil-Hoon Lee ,  Jae-Youl Lee

IPC: G09G3/20 ,  G09G3/36 ,  G09G5/00 ,  G09G3/3275

Abstract: A method of driving a display by communicating with a controller through a first channel and a second channel includes; generating recovery data from a signal received through the first channel during a frame data period, detecting a vertical blank period between frame data periods, checking a training trigger event history during the vertical blank period, and during the vertical blank period, transmitting a training request direct to the first channel through the second channel when there is a training trigger event history.

公开(公告)号：US10355700B2

公开(公告)日：2019-07-16

申请号：US16150347

申请日：2018-10-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung-Pil Lim ,  Kyung-Ho Ryu ,  Jae-Suk Yu ,  Jae-Youl Lee ,  Dong-Myung Lee ,  Hyun-Wook Lim

IPC: H03L7/085 ,  H03L7/081 ,  H04L7/04 ,  H03L7/08

Abstract: A method of recovering a clock and data from an input data signal including an embedded clock, the method including generating a recovery clock signal from the input data signal based on a first window signal; detecting a unit interval corresponding to one bit of the input data signal based on the recovery clock signal; delaying a signal synchronized with the recovery clock signal based on the unit interval; and generating the first window signal based on the delayed signal.