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1.
公开(公告)号:US12130756B2
公开(公告)日:2024-10-29
申请号:US18364872
申请日:2023-08-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hanmin Park , Hyung-Dal Kwon , Jaehyeong Sim , Seungwook Lee , Jae-Eon Jo
CPC classification number: G06F13/1668 , G06N3/04
Abstract: An accelerator, a method of operating the accelerator, and an electronic device including the accelerator. A method of operating the accelerator configured to perform a target operation includes packing input data with a data layout determined based on a word width of a memory in the accelerator and a spatial size of a filter to be applied to the target operation and storing the packed input data in the memory, and performing the target operation between a portion of the input data stored in a same word in the memory and weights of the filter.
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2.
公开(公告)号:US11741026B2
公开(公告)日:2023-08-29
申请号:US17182439
申请日:2021-02-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hanmin Park , Hyung-Dal Kwon , Jaehyeong Sim , Seungwook Lee , Jae-Eon Jo
CPC classification number: G06F13/1668 , G06N3/04
Abstract: An accelerator, a method of operating the accelerator, and an electronic device including the accelerator. A method of operating the accelerator configured to perform a target operation includes packing input data with a data layout determined based on a word width of a memory in the accelerator and a spatial size of a filter to be applied to the target operation and storing the packed input data in the memory, and performing the target operation between a portion of the input data stored in a same word in the memory and weights of the filter.
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公开(公告)号:US12175299B2
公开(公告)日:2024-12-24
申请号:US17223139
申请日:2021-04-06
Applicant: SAMSUNG ELECTRONICS CO., LTD
Inventor: Jae-Eon Jo , Hyung-Dal Kwon , Hanmin Park , Jaehyeong Sim , Seung Wook Lee
IPC: G06F9/50 , G06F1/3237 , G06F9/48 , G06N3/045 , G06N3/063
Abstract: A computing device and method is disclosed. The computing device includes a plurality of processing cores, and a tile scheduler configured to update a cost matrix of each of the plurality of processing cores based on meta information of each of first tiles previously allocated to the plurality of processing cores and meta information of each of second tiles, and allocate the second tiles with respect to the plurality of processing cores using the updated cost matrix of each of the plurality of processing cores.
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公开(公告)号:US10909418B2
公开(公告)日:2021-02-02
申请号:US16884232
申请日:2020-05-27
Inventor: Sehwan Lee , Leesup Kim , Hyeonuk Kim , Jaehyeong Sim , Yeongjae Choi
Abstract: A processor-implemented neural network method includes: obtaining, from a memory, data of an input feature map and kernels having a binary-weight, wherein the kernels are to be processed in a layer of a neural network; decomposing each of the kernels into a first type sub-kernel reconstructed with weights of a same sign, and a second type sub-kernel for correcting a difference between a respective kernel, among the kernels, and the first type sub-kernel; performing a convolution operation by using the input feature map and the first type sub-kernels and the second type sub-kernels decomposed from each of the kernels; and obtaining an output feature map by combining results of the convolution operation.
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公开(公告)号:US10699160B2
公开(公告)日:2020-06-30
申请号:US16110664
申请日:2018-08-23
Inventor: Sehwan Lee , Leesup Kim , Hyeonuk Kim , Jaehyeong Sim , Yeongjae Choi
Abstract: A processor-implemented neural network method includes: obtaining, from a memory, data an input feature map and kernels having a binary-weight, wherein the kernels are to be processed in a layer of a neural network; decomposing each of the kernels into a first type sub-kernel reconstructed with weights of a same sign, and a second type sub-kernel for correcting a difference between a respective kernel, among the kernels, and the first type sub-kernel; performing a convolution operation by using the input feature map and the first type sub-kernels and the second type sub-kernels decomposed from each of the kernels; and obtaining an output feature map by combining results of the convolution operation.
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